Design Engineer Jobs

About The Position

Requirements

• Master’s degree or foreign equivalent in Electrical Engineering or a related field.
• Experience and/or education developing reusable SystemVerilog test benches with constraint-random and directed stimulus, monitors, checkers, and coverage points.
• Experience and/or education applying object-oriented programming principles, including encapsulation, abstraction, inheritance, and polymorphism, to build cycle-accurate and transaction-accurate behavior models.
• Experience and/or education implementing UVM to design scalable, modular, reusable verification environments aligned with project verification plans.
• Experience and/or education producing verification and coverage plans to estimate verification effort and align with project schedules and deliverables.
• Experience and/or education automating regression workflows using Python, Ruby, or Perl, including generating result charts and reusable verification components.
• Experience and/or education executing simulations with industry-standard tools, including Cadence Xcelium, to compile, run, and profile verification environments for RTL validation.
• Experience and/or education analyzing simulation traces using waveform debuggers such as Verdi or Indago.
• Experience and/or education using UNIX/Linux command-line utilities for file manipulation, data searching, and automation.
• Experience and/or education designing and debugging algorithmic reference models to validate hardware functionality and performance.
• Experience and/or education collaborating with cross-functional teams to integrate verification strategies with design and architecture requirements.

Responsibilities

• Review design and architecture specifications for alignment with functional and performance goals.
• Collaborate with design and micro-architecture teams to understand design requirements, constraints, and real-world use cases.
• Develop test plans, test cases, and coverage plans to validate chip design functionality and performance.
• Refine and design verification methodologies and test benches for improved efficiency and effectiveness.
• Run and triage regressions to identify and resolve chip design issues.
• Track issues and evaluate coverage data to ensure thorough testing and verification coverage.
• Collaborate with design, architecture, and software teams to understand use cases and corner conditions and develop effective test cases.
• Develop reusable SystemVerilog test benches with constraint-random and directed stimulus, monitors, checkers, and coverage points.
• Apply object-oriented programming principles to build cycle-accurate and transaction-accurate behavior models.
• Implement UVM to build scalable, modular, and reusable verification environments aligned with project verification plans.
• Produce verification and coverage plans to estimate verification effort and align it with project schedules and deliverables.
• Automate regression workflows with Python, Ruby, or Perl, including generating result charts and reusable verification components.
• Execute and profile simulations using industry-standard tools, including Cadence Xcelium, for RTL validation.
• Analyze simulation traces using waveform debuggers such as Verdi and Indago to identify design bugs and validate signal interactions.
• Use UNIX/Linux command-line utilities for file manipulation, data searching, and task automation.
• Design and debug algorithmic reference models to validate hardware functional correctness and performance.
• Collaborate with cross-functional teams to integrate verification strategies with design and architecture requirements and deliver project milestones on time.

Benefits

• Comprehensive medical and dental coverage.
• Retirement benefits.
• Discounted products and free services.
• Reimbursement for certain education expenses, including tuition, for formal education related to career advancement at Apple.
• Eligibility for discretionary restricted stock unit awards.
• Opportunity to purchase Apple stock at a discount through voluntary participation in the Employee Stock Purchase Plan.
• The role might be eligible for discretionary bonuses or commission payments.
• The role might be eligible for relocation.