Design for Test Engineer

Apple • Cupertino, CA

1d • $174,149 - $225,300

About The Position

Apple Inc. is hiring a Design for Test Engineer in Cupertino, California, and various unanticipated locations throughout the USA. The role reviews architecture and design specifications, extracts design features, and develops attributes and verification plans. It works with designers to verify DFT implementation and run checks, and supports verification flows, automation scripts, and regressions.

The engineer implements test benches, assertions, and checkers; generates directed and constrained-random tests; debugs failures; runs RTL and power-aware gate-level simulations; tracks bugs; and closes coverage. The role also builds custom test benches for power-aware designs, generates test collateral and reports, performs simulations at RTL and gate-netlist levels with X-propagation and UPF enabled, generates pattern files with DV test scripts, and runs playback simulations with the generated patterns.

The position handles schedules and supports cross-functional engineering efforts. It works with test engineers to bring up functional and structural patterns for various analog IPs and DFT features on silicon, and supports further characterization and test-time optimization. The stated work schedule is 40 hours per week.

Requirements

• Master’s degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronics Engineering, or a related field.
• At least 1 year of experience in the job offered or a related occupation.
• Experience or education utilizing VLSI design and VLSI architecture to understand complex ASIC designs.
• Experience or education using computer architecture to aid in understanding compute.
• Experience or education using Verilog to debug and verify designs.
• Experience or education using Perl, Python, or Tcl scripting to automate scripts and internal tools.
• Experience or education with CMOS devices and circuits.
• Experience or education in digital logic gate analysis and design.
• Experience or education in test automation and test methodology.
• Experience or education performing timing analysis to debug complex timing bugs.
• Experience or education employing synthesis and simulation to debug RTL and netlist issues.
• Experience or education utilizing DFT knowledge to generate ATE patterns and perform ATE debugging.
• Experience or education verifying memory operation behavior using knowledge of memory circuits.

Responsibilities

• Review architecture and design specifications.
• Extract design features and develop attributes and verification plans.
• Work with designers to verify DFT implementation and run checks.
• Implement test benches, assertions, and checkers, and generate directed and constrained-random tests.
• Debug failures, run RTL and power-aware gate-level simulations, track bugs, and close coverage.
• Build custom test benches for power-aware designs.
• Generate test collateral and reports.
• Perform simulations in RTL and gate netlists with X-propagation and UPF enabled.
• Generate pattern files with DV test scripts and run playback simulations with the generated patterns.
• Handle schedules and support multifunctional engineering efforts.
• Assist with verification flows, automation scripts, and regressions.
• Work with test engineers to bring up functional and structural patterns for analog IPs and DFT features on silicon.
• Support further characterization and test-time optimization.

Benefits

• Opportunity to participate in discretionary employee stock programs, including discretionary restricted stock unit awards.
• Ability to purchase Apple stock at a discount through voluntary participation in the Employee Stock Purchase Plan.
• Comprehensive medical and dental coverage.
• Retirement benefits.
• Discounted products and free services.
• Reimbursement for certain educational expenses, including tuition, for formal education related to advancing a career at Apple.
• The role might be eligible for discretionary bonuses or commission payments.
• The role might be eligible for relocation.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level