Design Verification Engineer

Apple • Cupertino, CA

3d • $174,149 - $225,300

About The Position

Apple Inc. is hiring a Design Verification Engineer in Cupertino, California, and various unanticipated locations throughout the USA. The role focuses on ensuring bug-free first silicon for part of a system-on-chip (SoC) or IP and developing detailed test and coverage plans based on microarchitecture. The engineer will develop scalable, portable verification methodologies and environments, including stimulus, checkers, assertions, trackers, and coverage.

The position includes creating and executing verification plans for assigned features; bringing up designs and verification environments; enabling regressions; and debugging test failures. The engineer will develop block-, IP-, and SoC-level testbenches and track and report verification progress using metrics such as bugs and coverage. The role is 40 hours per week.

Requirements

• Master’s degree or foreign equivalent in Electrical Engineering, Electronics Engineering, or a related field.
• Experience and/or education using SystemVerilog for constrained-random verification and functional coverage.
• Experience and/or education using UVM to develop verification environments and implement directed and random test cases.
• Experience and/or education using C and C++, demonstrating strong software skills in data structures and algorithms.
• Experience and/or education using Python and Perl for test-vector generation and executable scripts.
• Experience and/or education using EDA tools for testbench simulations, debugging, and coverage closure.
• Experience and/or education with high-speed interface protocols for verifying high-bandwidth, low-power data communication systems.
• Experience and/or education in digital design to understand ASIC design flows and verification.
• Experience and/or education in computer architecture for exploring memory subsystems and architecture trade-off analysis.

Responsibilities

• Ensure bug-free first silicon for part of the SoC or IP.
• Develop detailed test and coverage plans based on the microarchitecture.
• Develop a scalable and portable verification methodology suitable for the IP.
• Develop verification environments with components including stimulus, checkers, assertions, trackers, and coverage.
• Develop and execute verification plans for assigned features.
• Perform design and verification-environment bring-up, enable regressions for assigned features, and debug test failures.
• Develop block-, IP-, and SoC-level testbenches.
• Track and report design-verification progress using metrics including bugs and coverage.

Benefits

• Opportunity to participate in discretionary employee stock programs, including restricted stock unit awards.
• Opportunity to purchase Apple stock at a discount through the Employee Stock Purchase Plan.
• Comprehensive medical and dental coverage.
• Retirement benefits.
• Discounted products and free services.
• Reimbursement for certain education expenses, including tuition, for formal education related to career advancement at Apple.
• May be eligible for discretionary bonuses or commission payments.
• May be eligible for relocation assistance.

What This Job Offers

• Job Type: Full-time