Engineer Jobs

About The Position

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.
• Minimum 5 years of experience in digital ASIC or SOC RTL design.
• Experience with RTL design in Verilog or System Verilog for modem or PHY blocks.
• Experience with Arm compute subsystem design, including AXI interconnect and SRAM controllers.
• Experience implementing signal-processing hardware such as filters, FFT, or forward error correction.
• Must be a U.S. citizen or national, U.S. permanent resident (current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.
• Required to pass Blue’s Standard Background Check.

Nice To Haves

• Master's degree in Electrical Engineering, Computer Engineering, or a related technical field.
• Experience with debug subsystem design using Arm CoreSight components.
• Experience defining microarchitecture from communication system and algorithm specifications.
• Experience with SOC-level integration, including bus fabric, clock, and reset architecture.
• Experience with synthesis, timing constraint development, and timing closure support.
• Experience with LPDDR6 or other high-speed memory interface subsystems.
• Experience with gigabit Ethernet or 25G high-speed serial interface subsystems.

Responsibilities

• Design RTL in Verilog or System Verilog for modem datapath and PHY blocks.
• Define microarchitecture from satellite communication system specifications and performance requirements.
• Implement signal-processing hardware, including filters, FFT, equalizers, and forward error correction.
• Develop Arm compute subsystem logic, including AXI interconnect and SRAM controller integration.
• Integrate debug subsystem components using Arm CoreSight architecture and associated trace infrastructure.
• Design general-purpose IO subsystem logic and associated configuration register interfaces.
• Integrate subsystem and SOC-level blocks, including clock and reset architecture.
• Support synthesis, timing constraint development, and timing closure with physical design teams.

Benefits

• Medical insurance
• Dental insurance
• Vision insurance
• Basic and supplemental life insurance
• Paid parental leave
• Short- and long-term disability
• 401(k) with company match of up to 5%
• Education Support Program
• Stock options for regular employees working at least 20 hours per week
• Paid time off of up to four weeks per year based on weekly scheduled hours
• Up to 14 company-paid holidays
• Employees may be eligible for bonuses depending on role type and job level; bonus eligibility and amounts are not guaranteed and may change or be canceled.