Principal Engineer - FPGA/ASIC Design

Rolls-Royce•Indianapolis, IN

1d•$122,741 - $247,054•Hybrid

About The Position

Rolls-Royce is seeking a Principal Engineer specializing in FPGA/ASIC design to work on engine control system products. The role involves designing, verifying, integrating, and testing FPGA/ASIC solutions for current and future products, and participating in all project phases. The position is based in Indianapolis, Indiana, or Reston, Virginia, with a hybrid schedule and travel of up to 25% between Rolls-Royce sites in Indianapolis and West Lafayette, Indiana, as needed. Hybrid employees are expected to attend the workplace an average of three days per week and must maintain secure, high-speed internet and an appropriate workspace. Hybrid arrangements may change based on business needs or company policy. The engineer will develop FPGA/ASIC architectures and RTL, run simulations and synthesis, create test benches, evaluate design process flows, and prepare documentation for certification authority review. The work supports electronic engine control units and includes verification of complex FPGA/ASIC products to DO-254. Relocation assistance is available. The position requires U.S. citizenship.

Requirements

Bachelor's degree in Electronics Engineering and/or Computer Engineering with at least 5 years of experience, or a master's degree in either field with at least 3 years of experience, or a PhD in either field.
Must be a U.S. citizen.
Experience developing RTL with a hardware description language such as VHDL, Verilog, and/or SystemVerilog.
Experience debugging designs using simulation tools.
Expertise achieving timing closure on FPGA designs and generating test benches.

Nice To Haves

Experience validating FPGA hardware in a lab using test equipment such as oscilloscopes and logic analyzers, and debug tools such as ILA and JTAG.
Scripting experience with languages such as TCL, Python, or Shell scripts.
Ability to work in Windows and Linux development environments.
Demonstrable experience with version control such as Git or SVN.
Experience with Actel and Xilinx tool flows to implement complete designs.
Experience developing model-based systems with digital engineering toolsets such as MATLAB, Simulink, or similar.
Knowledge of systems engineering, robust design tools and techniques, and model-centric development approaches.
Experience with Cameo Systems Modeler (MagicDraw) or similar SysML modeling software.

Responsibilities

Participate in all phases of projects and produce detailed design documentation, verification plans, and reports.
Design and develop custom digital devices (ASIC or FPGA) to support Rolls-Royce electronic engine control units.
Verify complex products that use FPGAs and/or ASICs to DO-254.
Develop RTL using a hardware description language such as VHDL, Verilog, and/or SystemVerilog, and debug designs using simulation tools.
Achieve timing closure on FPGA designs and generate test benches.
Evaluate process flows, including high-level design, synthesis, place and route, timing constraints, and power utilization.
Design, verify, integrate, and test FPGA/ASIC solutions for current and future engine control system products.
Travel between Rolls-Royce sites in Indianapolis and West Lafayette, Indiana, as needed, up to 25%.