Systems Engineer Jobs

About The Position

Requirements

• 15+ years of experience in IC design implementation and signoff, with demonstrated success managing large-scale technical programs.
• BS or MS in Electrical Engineering, Computer Engineering, or a related field.
• Deep expertise in digital design fundamentals, advanced-node STA and ECOs (3nm and below), and EDA tool ecosystems.
• Core timing signoff expertise, advanced-node STA, UPF and constraints debugging, and hierarchical and 3DIC design STA and closure solutions.
• Proven track record of leading technical teams and driving customer success at executive levels.
• Strong proficiency in Tcl, Python, or Perl scripting and flow customization for design closure.
• Excellent communication, negotiation, and leadership skills, with the ability to influence internal and external stakeholders.

Nice To Haves

• Prior experience with Cadence tools (Tempus, Certus, QRC) and competitive solutions is highly desirable.

Responsibilities

• Lead technical engagements with customers and partners to drive adoption of the Cadence signoff portfolio.
• Work with design teams to meet customer success metrics and guide adoption of Cadence timing signoff and closure and AgenticAI features across advanced nodes.
• Partner with R&D and Product Engineering to influence tool enhancements based on real-world customer requirements.
• Drive complex benchmarks, flow optimizations, and deployment of methodologies for timing signoff and closure, STA, IR drop, and power/timing closure.
• Represent Cadence at industry forums, author technical papers, and deliver keynote presentations.

Benefits

• Paid vacation
• Paid holidays
• 401(k) plan with employer match
• Employee stock purchase plan
• Medical plan options
• Dental plan options
• Vision plan options
• Potential incentive compensation, including bonus and equity