Engineer Jobs

About The Position

Requirements

• Strong candidates may have: Hands-on experience in ASIC or SoC design, functional verification, formal verification, or related semiconductor engineering
• Strong fluency in SystemVerilog, Verilog, or both
• Experience with production silicon, tapeout, IP development, chip integration, or subsystem verification
• Solid knowledge of interface protocols, handshaking, backpressure, multiple clock domains, and multi-module dataflow
• Experience working independently on complex design or verification problems
• Strong written communication and the ability to explain hardware engineering decisions clearly
• Reliable availability for approximately 20–40 hours per week
• A degree in electrical engineering, computer engineering, electronics engineering, computer science, or a related technical field is highly relevant
• Equivalent hands-on engineering experience may also be considered

Nice To Haves

• Experience with RTL design, microarchitecture, or custom IP development
• Background in IP integration, bring-up, or system configuration involving NoC, PCIe, DDR, ARM, or AXI
• Experience with UVM, SVA, CocoTB, testbench architecture, or coverage-driven verification
• Familiarity with formal verification, property checking, and coverage closure
• Knowledge of synthesis, timing analysis, power-performance-area optimisation, or physical design considerations
• Experience in analog or mixed-signal design verification
• Familiarity with tools such as Synopsys VCS, Cadence Xcelium, Siemens Questa, VC Formal, or Verdi
• Experience with open-source tools such as Icarus Verilog, Verilator, Yosys, CocoTB, or OpenROAD
• Previous involvement in AI evaluation, training-data development, technical annotation, or model benchmarking

Responsibilities

• Design realistic ASIC and SoC engineering problems based on practical industry experience
• Create tasks involving RTL implementation, debugging, functional verification, microarchitecture, integration, or optimisation
• Develop scenarios that reflect genuine engineering challenges rather than textbook exercises
• Define clear technical requirements, constraints, expected behaviour, and evaluation criteria
• Write accurate reference RTL using SystemVerilog or Verilog
• Develop supporting testbenches, assertions, specifications, and technical documentation
• Create solutions covering combinational and sequential logic, control paths, datapaths, interfaces, and subsystem behaviour
• Ensure reference implementations are technically sound, reproducible, and appropriately challenging
• Run engineering tasks against AI models and assess the correctness of generated solutions
• Identify issues in logic, implementation, protocol handling, verification methodology, and technical reasoning
• Evaluate whether proposed designs satisfy functional, architectural, and performance requirements
• Explain model strengths, weaknesses, and failure modes through clear written technical feedback
• Review tasks and solutions developed by other hardware specialists
• Maintain consistent standards for technical rigor, realism, complexity, and completeness
• Collaborate with engineers across design, verification, formal methods, synthesis, and integration disciplines
• Contribute to shared evaluation frameworks and quality-calibration activities

Benefits

• Flexible part-time commitment
• Competitive hourly compensation
• Work remotely
• Competitive rates between $65–$95 per hour depending on expertise and project scope