Design Engineer Jobs

About The Position

Requirements

• Bachelor's or master's degree in electrical engineering, Computer Engineering, Computer Science, or related field.
• Strong knowledge of: System Verilog, UVM, C, Assertion-Based Verification (SVA), Coverage-Driven Verification, System level Use case verification
• Experience developing verification environments from architecture/specification through signoff.
• Strong understanding of computer architecture and digital design fundamentals.
• Experience debugging complex SoC-level issues.
• Strong problem-solving and analytical skills.
• Proficiency in Python or scripting languages for automation.
• AI-assisted verification of workflows and test generation.
• Excellent communication and collaboration skills.
• Bachelor's degree in Science, Engineering, or related field.

Nice To Haves

• Experience in full-chip or subsystem verification environments.
• Experience with one or more of the following: CPU verification, Cache coherency protocols (ACE, CHI, CXL), DDR or HBM memory systems, PCIe, Ethernet, or networking protocols, AI/ML accelerator design verification, Security and RAS feature verification, System Power and Performance verification.
• Experience with: Portable Stimulus (PSS), Formal Verification, Emulation platforms (Veloce/Palladium/ZeBu), Power-aware verification.
• Understanding of machine learning and Generative AI concepts.
• Knowledge of LLMs such as GPT, Claude, Llama, or equivalent models.

Responsibilities

• Develop and execute comprehensive verification plans for SoC, subsystem, and IP-level features.
• Design and implement scalable System Verilog/UVM-based and Processor-based verification environments.
• Create directed and constrained-random test scenarios to validate functionality and architectural use cases.
• Develop assertions, functional coverage models, and checkers.
• Debug RTL, testbench, and integration issues and work closely with design teams to resolve defects.
• Drive coverage closure using functional and code coverage metrics.
• Participate in architecture and design reviews to ensure verification requirements are incorporated early in the development cycle.
• Verify complex Data Center SoC features.
• Support emulation and acceleration-based verification when required.
• Contribute to methodology improvements, automation, reusable verification components, and AI-assisted verification flows.
• Develop AI agents that automate engineering tasks across domains workflows.
• Build agent workflows using modern LLM frameworks and agent orchestration platforms.
• Create integrations between AI systems and engineering tools, databases, and knowledge repositories.
• Develop Retrieval Augmented Generation (RAG) pipelines for system documentation, specifications, and engineering knowledge.
• Collaborate with RTL, DV, CAD, and AI platform teams to identify automation opportunities.
• Measure and track productivity improvements delivered through AI-enabled workflows.
• Contribute to internal AI platforms, reusable skills, tools, and agent libraries.

Benefits

• Competitive annual discretionary bonus program
• Opportunity for annual RSU grants
• Highly competitive benefits package designed to support your success at work, at home, and at play.