Validation Engineer Jobs

About The Position

Requirements

• Bachelor's degree in Electrical Engineering or Computer Engineering with a minimum of 8 years of related experience, or a Master's degree with a minimum of 6 years of related experience
• Extensive hands-on experience in post-silicon validation, characterization, and debug of high-speed mixed-signal interface IP; direct experience with UCIe or another die-to-die interface is strongly preferred, and high-speed SerDes experience is applicable
• Working knowledge of the UCIe specification, including the PHY and D2D adapter layers, link initialization and training, sideband operation, and standard versus advanced package considerations
• Advanced software development capability across multiple languages including Python, C, and C++, with a strong command of software engineering best practices, data structures, and algorithms; experience with software version control systems such as GitLab and with issue and task tracking through Jira and Confluence is a plus
• Demonstrated experience architecting complex software projects, including lab automation frameworks and Python UI development, that other engineers depend on
• Expert-level debug experience with high-speed oscilloscopes, BERTs, spectrum analyzers, and network analyzers, and the ability to extract meaningful signal integrity and protocol-level insights from noisy lab data
• Experience supporting customer silicon bring up and debug, including working in a customer lab environment and communicating findings directly to external engineering teams; experience with Signals & Systems concepts, transmission line theory, and high-speed link analysis applied to package, interposer, and substrate channels is a plus

Nice To Haves

• A sophisticated technical professional who applies advanced knowledge and wide-ranging experience to resolve complex problems in creative and effective ways, not by following a checklist but by understanding the system deeply enough to know where to look
• A seasoned lab engineer who is recognized as a go-to resource for difficult silicon debug, whether the silicon is ours or a customer's, and who can diagnose problems under schedule pressure in an unfamiliar lab without losing your cool
• A credible technical presence in front of customers, comfortable presenting data that may not be what they wanted to hear and explaining what it means and what comes next in terms they can act on
• A mentor who invests in the growth of junior engineers and elevates the technical standards of the team, not by doing the work for them but by teaching them how to think through the problem
• An effective communicator who can convey complex technical information to designers, management, and customers alike, adjusting the level of detail and framing to match the audience without losing the nuance
• A collaborative influencer who can justify an approach and gain the cooperation of other groups across the department, even when your recommendation requires them to change their plan

Responsibilities

• Own the post-silicon electrical validation and characterization strategy for UCIe die-to-die interface IP, from test plan definition through silicon sign-off, determining what gets measured, how it gets measured, and what constitutes a pass
• Architect and develop the software solutions the team uses for lab automation, result processing, and silicon debug, spanning Python, C, and C++, including frameworks that handle instrument control, data capture, and automated test execution
• Lead complex debug efforts that span circuit design, package and interposer channel behavior, link training firmware, and protocol layer interactions, driving issues to root cause when the failure mode is ambiguous and the data is incomplete
• Support customers directly with the bring up and debug of their silicon, including sideband and mainband link training, lane repair and reversal, degraded mode operation, and chiplet interoperability, delivered through on-site lab visits and remote correlation sessions
• Develop characterization methodology for die-to-die links where direct probe access is limited, making effective use of on-die instrumentation, eye margining, built-in monitors, and traditional bench equipment like oscilloscopes, BERTs, and spectrum analyzers
• Design and develop UIs and data presentation tools used for customer evaluations, marketing demonstrations, and internal reporting, ensuring that complex silicon behavior is communicated clearly to technical and non-technical audiences
• Review and approve the work of other validation engineers, provide technical mentorship and coaching to junior and mid-level team members, and establish the measurement and correlation methodology the broader team adopts

Benefits

• Comprehensive range of health, wellness, and financial benefits
• Monetary and non-monetary offerings
• Annual bonus
• Equity
• Other discretionary bonuses
• Comprehensive health, wellness, and financial benefits as part of a competitive total rewards package