Wireless SOC Design Verification Engineer

Apple • San Diego, CA

1d

About The Position

Apple is hiring a Wireless SOC Design Verification Engineer to verify wireless chips that power connectivity across new iPhones. The engineer will own verification scope end-to-end on each project, from test planning through signoff, with opportunities to develop deeper expertise in specific IPs and subsystems or broader expertise across IPs, subsystems, and SOC integration levels.

The role covers the Power Management Unit, CPU subsystem, on-chip debug infrastructure, PCIe, bus fabric, boot and secure-boot sequencing, and peripherals such as SPI and UART. Verification approaches may include simulation, formal verification, or other approaches appropriate to the design. The engineer will verify power intent using UPF across their area of responsibility and contribute to the team's development of AI-assisted verification practices, including potential applications in test generation, debug, and verification closure.

Requirements

• Bachelor's degree.
• Expertise in SystemVerilog coding.
• Expertise in UVM methodology.

Nice To Haves

• Hands-on UVM verification experience with PCIe, bus fabric, NOC, AHB, or AXI-based bus architectures.
• Experience verifying IP or top-level integration for a WiFi or Bluetooth SOC.
• Experience with formal verification.
• In-depth knowledge and experience with low-power design, UPF integration, boot-up, power-cycling, and hardware/firmware interaction verification.
• Experience taping out large SOC systems with embedded processor cores.
• Excellent teamwork, communication, and problem-solving skills, and a desire to seek diverse challenges.

Responsibilities

• Own verification scope end-to-end for assigned projects, from test planning through signoff.
• Verify the Power Management Unit, CPU subsystem, on-chip debug infrastructure, PCIe, bus fabric, boot and secure-boot sequencing, and peripherals such as SPI and UART.
• Select simulation, formal verification, or other verification approaches appropriate to the design.
• Verify power intent using UPF within the assigned area, including across more than an individual IP where applicable.
• Help determine how AI-assisted verification can be used for test generation, debug, verification closure, or other areas.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior