SOC Design Verification Engineer

Apple • San Diego, CA

8h

About The Position

Apple is seeking a Wireless SOC Design Verification Engineer to join its wireless silicon development team. The wireless SOC organization develops wireless silicon, emphasizing energy efficiency and technologies that improve the product-level user experience. Its vertically integrated teams span RF/Analog, Systems/PHY/MAC, VLSI/RTL design and integration, emulation, design verification, test and validation, and firmware/software engineering.

The engineer will own a meaningful verification scope and may expand that scope from project to project. The role covers pre-silicon RTL verification at block, subsystem, and top-level SOC levels, from test planning through coverage closure and signoff. The engineer will work with architects, designers, and firmware engineers to develop reusable testbenches and verification environments using modern, metric-driven methods. Verification approaches may include simulation and formal methods, as appropriate to the design, and low-power verification using UPF. The role may span areas such as power management, CPU subsystems, DMA, on-chip debug, PCIe, bus fabric, boot and secure-boot sequencing, MAC-PHY, radio integration, and peripherals. The team is also exploring how AI-assisted methods can support test generation, debug, and coverage closure.

Requirements

• Bachelor of Science degree.
• At least 10 years of relevant industry experience.
• Hands-on experience across the verification cycle, including test planning, testbench implementation, test creation and debug, and coverage closure.
• Strong SystemVerilog and Verilog skills, with solid working knowledge of UVM.
• Strong problem-solving and debugging skills with constrained-random verification.
• Understanding of digital logic design, SOC architecture, and microarchitecture.

Nice To Haves

• Experience taking at least one ASIC/SOC from concept through tape-out.
• UVM verification experience with PCIe, bus fabric/NOC, or AHB/AXI-based architectures.
• Experience verifying IP or top-level integration for a WiFi or Bluetooth SOC, or knowledge of wireless protocols.
• Experience with low-power verification, UPF, boot-up, power-cycling, and hardware/firmware interaction.
• Experience with SystemVerilog Assertions (SVA) and/or formal tools such as JasperGold.
• Experience defining coverage space and writing coverage models.
• Experience with embedded CPU verification and programming in C/C++ or assembly.
• Scripting experience in Python or Perl.
• Interest in applying AI/ML to verification workflows.
• Excellent communication skills, teamwork, and a desire to take on diverse challenges.

Responsibilities

• Perform pre-silicon RTL verification at block, subsystem, and top-level SOC levels.
• Own verification scope from test planning through coverage closure and signoff.
• Build reusable testbenches and verification environments using metric-driven methodology.
• Work with architects, designers, and firmware engineers on verification activities.
• Select simulation, formal, or other appropriate verification approaches for the design.
• Verify power intent using UPF within the assigned scope.
• Help identify effective applications of AI-assisted verification, including test generation, debug, and coverage closure.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior