Staff Design Verification Engineer

Renesas Electronics•Melbourne, FL

8h•Onsite

About The Position

Renesas is seeking an experienced Staff Design Verification Engineer to verify leading-edge memory interface products for data center, AI, and cloud computing applications. The role contributes to verification of advanced memory data buffer products, including DDR6 and future generations, helping enable high-bandwidth, power-efficient memory solutions for intensive computing environments. Candidates must be open to relocation to Duluth, Georgia. Remote work is not available. The engineer will lead verification activities for complex digital designs at block and system levels, own verification environments and execution for assigned blocks and features, and collaborate with design engineers and project stakeholders. The role also serves as a technical resource to the team, supporting complex verification work and sharing best practices. Renesas describes itself as an embedded semiconductor solutions provider with a global team of more than 21,000 engineers and problem solvers in over 30 countries. Its culture is based on being Transparent, Agile, Global, Innovative, and Entrepreneurial. Employment is regular (PERM).

Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field, or equivalent experience.
At least 8 years of related experience in semiconductor design verification.
Strong semiconductor design verification experience.
Strong proficiency with SystemVerilog and hands-on experience using UVM (Universal Verification Methodology).
Experience developing and debugging UVM-based verification environments and testbenches.
Experience with verification planning, functional verification, coverage, checkers, test development, and debugging.
Ability to independently own complex verification assignments and determine appropriate verification approaches.
Strong analytical and problem-solving skills.
Must be open to relocation to Duluth, Georgia.

Nice To Haves

Experience with DDR4, DDR5, memory interfaces, data buffers, or other high-speed memory technologies.
Experience improving verification methodologies, efficiency, or reuse.
Experience serving as a technical resource or mentoring other engineers.

Responsibilities

Drive verification activities for complex digital designs at the block and system level.
Develop and execute verification plans based on functional and performance specifications.
Develop, maintain, and optimize SystemVerilog/UVM verification environments and testbenches.
Develop verification tests, functional coverage, checkers, and other verification components.
Own verification environments and verification execution for assigned blocks and features.
Drive and monitor coverage to ensure verification goals are achieved.
Work closely with design engineers to ensure designs meet requirements and are effectively verifiable.
Analyze verification results, debug failures, and identify functional or design issues.
Develop efficient, reusable verification environments and methodologies focused on quality, performance, and ease of use.
Identify and implement improvements to verification processes, methodologies, and design behavior.
Participate in feasibility studies and technical reviews.
Provide technical guidance on complex verification problems and share best practices.
Communicate verification status, risks, and results to project stakeholders.

Benefits

Medical benefits.
Health savings account with applicable medical plan.
Dental insurance.
Vision insurance.
Health and/or dependent care flexible spending accounts.
Pre-tax commuter benefits.
Life insurance, including company-paid life insurance.
Accidental death and dismemberment (AD&D) coverage, including company-paid coverage.
Pet insurance.
Long-term disability benefits.
Short-term medical benefits.
Paid sick time.
Paid holidays.
Accrued paid vacation.