SoC Design Verification and Methodology Senior Manager, Silicon Engineering

Google•Sunnyvale, CA

3d•$300,000 - $333,000

About The Position

As a Senior Manager, System on a Chip (SoC) Design Verification and Methodology for Google's TPU designs, you will lead a team and own functional verification for key components. You will guide the development of advanced methodologies and infrastructure at the subchip, subsystem, and full-chip levels, including comprehensive test plans, standardized verification flows, diagnostic code, monitors, and checkers. You will partner closely with front-end design, architecture, and performance teams. By analyzing coverage across multiple dimensions, you will help ensure architectural compliance, verify functional correctness, and guide your team toward key performance goals. The role supports Google's TPU technology for AI/ML applications and focuses on verifying complex digital designs, TPU architecture, and integration within AI/ML-driven systems. The AI and Infrastructure team delivers AI and infrastructure capabilities at scale, serving Google customers, Google Cloud customers, and Google users worldwide. Its work spans software and hardware, including TPUs, Vertex AI for Google Cloud, Google Global Networking, data center operations, and systems research.

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
15 years of experience with SoC design verification, SystemVerilog, and UVM.
6 years of experience in people management and developing employees.

Nice To Haves

Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture.
Experience defining, developing, and deploying advanced verification methodologies across complex SoCs.
Experience in low-power design verification.
Knowledge of general-purpose operating systems such as Linux and Android, and familiarity with ARM Instruction Set Architecture.

Responsibilities

Lead a team, set and communicate individual and team priorities aligned with organizational goals, meet regularly with team members to discuss performance and development, and provide feedback and coaching.
Define and drive advanced verification methodologies and strategies, including simulation for bug hunts, formal verification for corner-case bugs, and emulation for system validation.
Guide functional verification for portions of TPU designs and develop scalable functional verification infrastructure across subchip, subsystem, and full-chip environments.
Partner with front-end design, architecture, and performance teams to help ensure architectural compliance and achievement of performance goals.
Provide test plans covering verification strategy, environment, components, stimulus, checks, and coverage, and ensure methodology documentation is standardized and easy to use.