Senior Silicon Design Verification Engineer

Microsoft • Mountain View, CA

3d • $119,800 - $261,000

About The Position

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) powers Microsoft’s Intelligent Cloud through its cloud infrastructure and foundational technologies. The Compute Silicon & Manufacturing Engineering (CSME) organization designs, develops, manufactures, and packages Microsoft computer chips, including Azure Cobalt. The Shared and Custom IP & Silicon (SCIPS) team supports cloud hardware manufacturing by improving planning, quality, delivery, scale, and sustainability. The Senior Silicon Design Verification Engineer will develop and support silicon verification and validation solutions, FPGA prototyping platforms, embedded firmware tests, and post-silicon bring-up and debug in collaboration with design, firmware, hardware, and security teams.

The role includes creating C and C++ test content, low-level drivers, and custom firmware for subsystem and SoC verification; maintaining build flows and FPGA platforms; developing Python tooling; and debugging FPGA and silicon issues in the lab. The engineer will run validation suites on first silicon, meet bring-up exit criteria, investigate failed tests to closure, and coordinate fixes across teams.

The position requires meeting Microsoft security-screening requirements, including a Microsoft Cloud Background Check upon hire or transfer and every two years thereafter. It also involves access to export-controlled information; the successful candidate must provide and verify citizenship, U.S. permanent residency, or other eligible protected status as a condition of employment.

Requirements

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field and at least 1 year of technical engineering experience; or a master's degree in one of these fields and at least 4 years of technical engineering experience; or a bachelor's degree in one of these fields and at least 5 years of technical engineering experience; or equivalent experience.
• Ability to meet Microsoft, customer, and/or government security screening requirements, including passing the Microsoft Cloud Background Check upon hire or transfer and every two years thereafter.
• Provide proof of citizenship, U.S. permanent residency, or other eligible protected status to establish eligibility for access to export-controlled information; citizenship will be verified with a valid passport, with other documents applicable to lawful permanent residents, refugees, and asylees.

Nice To Haves

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field and at least 3 years of technical engineering experience; or a master's degree in one of these fields and at least 6 years of technical engineering experience; or a bachelor's degree in one of these fields and at least 8 years of technical engineering experience; or equivalent experience.
• Experience developing C and C++ test content for subsystem and SoC verification, including bare-metal and firmware-style tests, and working knowledge of SystemVerilog testbenches.
• Experience bringing up and maintaining FPGA prototyping or emulation platforms, such as HAPS or Xilinx, including board images, platform tooling, and testbench changes for firmware and validation teams.
• Hands-on hardware debugging experience using JTAG debuggers, logic analyzers, oscilloscopes, and multimeters.
• Experience owning pre-silicon verification of IP, subsystems, or SoCs through test planning, test development, failure debug, and coverage signoff.
• Experience with post-silicon bring-up and validation, including running silicon test suites and debugging boot, platform, and connectivity issues in a lab.
• Proficiency in Python or a similar scripting language such as Perl or Ruby for test automation, build flows, and log or data parsing.
• In-depth knowledge of verification principles, testbench architecture, and stimulus generation, with experience debugging complex designs.
• Experience with low-level and embedded software, including assembly, startup code, linker scripts, and Makefile-based build flows.
• Familiarity with industry protocols such as AMBA (AXI/AHB/APB), JTAG, SPI, I2C/I3C, and USB.
• Experience collaborating across architecture, design, firmware, and validation teams, with effective communication skills.
• Good understanding of silicon and/or computer architecture.

Responsibilities

• Develop C and C++ test content, low-level drivers, and custom firmware at subsystem and SoC levels, including self-checking tests for embedded processors.
• Extend compile and build flows to support custom firmware-style tests.
• Own FPGA prototyping platforms such as HAPS or Xilinx, including creating board images and bit files, designing custom FPGA RTL for protocol interfaces and feature enablement, and releasing and maintaining stable platforms for firmware teams.
• Develop and extend Python tooling to interface with FPGA platforms.
• Debug FPGA and post-silicon issues using JTAG debuggers, logic analyzers, oscilloscopes, and multimeters.
• Drive post-silicon bring-up and lab validation by running validation suites on first silicon, meeting bring-up exit criteria on schedule, and debugging platform issues such as JTAG failures, UART connectivity, and boot failures with design, firmware, hardware, and security teams.
• Root-cause post-silicon test failures to closure, including collecting and analyzing scan dumps, coordinating cross-team debug, and delivering fixes for issues such as fatal errors, driver access violations, and register conflicts with boot firmware.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior