Senior CPU Design Verification Engineer, Silicon

Google•Portland, OR
•$163,000 - $236,000

About The Position

Be part of a team developing custom silicon solutions that power Google's direct-to-consumer products. Contribute to innovations behind products used worldwide and help shape next-generation hardware experiences focused on performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. The team combines Google AI, software, and hardware to create helpful experiences, researching, designing, and developing technologies and hardware to make computing faster, more seamless, and more powerful. Individual pay is determined by job-related skills, experience, and relevant education or training. The listed U.S. compensation is $163,000–$236,000 USD, plus a 15% bonus target, equity, and benefits.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • At least 5 years of experience in verification methodologies and languages such as Universal Verification Methodology (UVM) and SystemVerilog.

Nice To Haves

  • Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture.
  • Experience in low-power design verification.
  • Experience with UVM, SystemVerilog, or scripting languages such as Python, Perl, Shell, or Bash.
  • Knowledge of operating systems such as Linux and Android.
  • Familiarity with the ARM instruction set architecture.

Responsibilities

  • Verify designs using verification techniques and methodologies.
  • Work cross-functionally to debug failures and verify the functional correctness of the design.
  • Provide test plans covering verification strategy, environment, components, stimulus, checks, and coverage, and ensure documentation is easy to use.
  • Perform design verification for future CPU developments.
  • Perform functional verification and performance validation for pre-silicon designs.

Benefits

  • 15% bonus target
  • Equity
  • Benefits
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