Senior Silicon Design Verification Engineer

Microsoft•Mountain View, CA
•$119,800 - $234,700

About The Position

Microsoft’s Silicon, Cloud, Hardware, and Infrastructure Engineering (SCHIE) organization builds infrastructure and foundational technologies for Microsoft’s online services and Azure. The Compute Silicon & Manufacturing Engineering organization designs, develops, manufactures, and packages Microsoft computer chips, including Azure Cobalt. Within it, the Shared and Custom IP & Silicon team supports hardware manufacturing by improving planning, quality, delivery, scale, and sustainability for Microsoft cloud hardware. The Senior Silicon Design Verification Engineer develops firmware-style verification content, supports and maintains FPGA prototyping platforms, and helps bring up and validate first silicon. The role works across design, firmware, hardware, security, and validation teams to investigate issues, analyze failures, and deliver fixes. The position requires security screening and eligibility to access export-controlled information.

Requirements

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field and at least 1 year of technical engineering experience; or a master's degree in one of these fields and at least 4 years of technical engineering experience; or a bachelor's degree in one of these fields and at least 5 years of technical engineering experience; or equivalent experience.
  • Ability to meet Microsoft, customer, and/or government security screening requirements, including passing the Microsoft Cloud Background Check upon hire or transfer and every two years thereafter.
  • Ability to satisfy export-control eligibility requirements and provide proof of citizenship, U.S. permanent residency, or other applicable protected status; citizenship is verified with a valid passport, with other documents accepted for lawful permanent residents, refugees, and asylees where applicable.

Nice To Haves

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field and at least 3 years of technical engineering experience; or a master's degree in one of these fields and at least 6 years of technical engineering experience; or a bachelor's degree in one of these fields and at least 8 years of technical engineering experience; or equivalent experience.
  • Experience developing C and C++ test content for subsystem and SoC verification, including bare-metal and firmware-style tests, and working knowledge of SystemVerilog testbenches.
  • Experience bringing up and maintaining FPGA prototyping or emulation platforms, including board images, platform tooling, and testbench changes for firmware and validation teams.
  • Hands-on hardware debugging experience with JTAG debuggers, logic analyzers, oscilloscopes, and multimeters.
  • Experience owning pre-silicon verification of IP, subsystems, or SoCs through test planning, test development, failure debugging, and coverage signoff.
  • Experience with post-silicon bring-up and validation, including running silicon test suites and debugging boot, platform, and connectivity issues in a lab.
  • Proficiency in Python or a similar scripting language such as Perl or Ruby for test automation, build flows, and log or data parsing.
  • In-depth knowledge of verification principles, testbench architecture, and stimulus generation, with a track record of debugging complex designs.
  • Experience with low-level and embedded software, including assembly, startup code, linker scripts, and Makefile-based build flows.
  • Familiarity with protocols such as AMBA (AXI/AHB/APB), JTAG, SPI, I2C/I3C, and USB.
  • Experience collaborating across architecture, design, firmware, and validation teams, with effective communication skills.
  • Good understanding of silicon and/or computer architecture.

Responsibilities

  • Develop C and C++ test content, low-level drivers, and custom firmware for subsystem and SoC verification, including self-checking tests that run on embedded processors.
  • Extend compile and build flows to support custom firmware-style tests.
  • Own the team's FPGA prototyping platforms, such as HAPS or Xilinx; create board images and bit files.
  • Design custom FPGA RTL for protocol interfaces and feature enablement.
  • Release stable FPGA platforms to the firmware team and maintain them as designs evolve.
  • Develop and extend Python tooling to interface with FPGA platforms.
  • Debug FPGA and post-silicon issues using tools such as JTAG debuggers, logic analyzers, oscilloscopes, and multimeters.
  • Drive post-silicon bring-up and lab validation by running validation suites on first silicon, meeting bring-up exit criteria, and debugging platform issues with design, firmware, hardware, and security teams.
  • Root-cause post-silicon test failures, collect and analyze scan dumps, coordinate cross-team debugging, and deliver fixes for issues such as fatal errors, driver access violations, and registers modified by boot firmware.
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