Senior Silicon Design Verification Engineer

Microsoft • Redmond, WA

1d • $119,800 - $261,000

About The Position

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) delivers core infrastructure and foundational technologies for Microsoft's online businesses and Azure platform. The Compute Silicon & Manufacturing Engineering (CSME) organization designs, develops, manufactures, and packages Microsoft's computer chips, including Azure Cobalt. Within CSME, the Shared and Custom IP & Silicon (SCIPS) team supports hardware manufacturing planning, quality, delivery, scale, and sustainability for Microsoft cloud hardware.

The Senior Silicon Design Verification Engineer will own pre-silicon verification strategy and execution for security IP blocks and subsystems, including their integration into the SoC. The role spans test planning, verification environment architecture, coverage and signoff, firmware and test development, and delivery through tapeout and silicon bring-up. The engineer will also serve as a verification lead and technical point of contact for customer and partner teams.

Requirements

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field and at least 1 year of technical engineering experience; or a master's degree in one of these fields and at least 4 years of technical engineering experience; or a bachelor's degree in one of these fields and at least 5 years of technical engineering experience; or equivalent experience.
• Ability to meet Microsoft, customer, and/or government security screening requirements, including passing the Microsoft Cloud Background Check upon hire or transfer and every two years thereafter.
• Provide proof of country of citizenship, U.S. permanent residency, or other protected status for assessment of eligibility to access export-controlled information; citizenship will be verified with a valid passport, with other documents accepted for lawful permanent residents, refugees, and asylees where applicable.

Nice To Haves

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field and at least 3 years of technical engineering experience; or a master's degree in one of these fields and at least 6 years of technical engineering experience; or a bachelor's degree in one of these fields and at least 8 years of technical engineering experience; or equivalent experience.
• Experience developing tests in C/C++, SystemVerilog, and UVM, particularly C/C++ test content for subsystem and SoC verification.
• Experience owning pre-silicon verification of IP, subsystems, or SoCs through the full cycle, including test planning, test development, failure debug, and coverage signoff.
• In-depth knowledge of verification principles, testbench architecture, and stimulus generation, with a record of debugging complex designs.
• Experience with low-level and embedded software, including assembly, startup code, linker scripts, and Makefile-based build flows.
• Familiarity with industry protocols such as AMBA (AXI/AHB/APB), JTAG, SPI, I2C/I3C, and USB.
• Experience collaborating across architecture, design, firmware, and validation teams, with communication skills.
• Understanding of silicon and/or computer architecture.

Responsibilities

• Own pre-silicon verification strategy and execution for one or more security IP blocks and subsystems and their integration into the SoC, including test planning, environment architecture, and signoff criteria from early design through tapeout and silicon bring-up.
• Architect and extend SystemVerilog and UVM environments that host C-based stimulus and connect embedded test code to the testbench for processor-driven and stimulus-driven scenarios.
• Drive functional, code, and power-aware coverage signoff; set goals, investigate and close gaps without unjustified exclusions, and use constrained-random, formal, and gate-level techniques to find bugs and establish test plan completeness.
• Act as verification lead and technical point of contact for customer and partner teams, owning milestone delivery at IP and SoC levels and keeping releases on schedule.
• Develop C and C++ test content, low-level drivers, and custom firmware at subsystem and SoC levels, including self-checking tests that run on embedded processors.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior