Senior Signal and Power Integrity Engineer

NVIDIA•Santa Clara, CA
•$136,000 - $264,500

About The Position

NVIDIA is seeking a Senior Signal and Power Integrity Engineer to support system and board-level signal integrity (SI) and power integrity (PI) design across product lines ranging from consumer graphics to self-driving cars and artificial intelligence. The role involves work with state-of-the-art technology and offers the opportunity to make an impact in a multifaceted, technology-focused company. The engineer will lead board and system SI design, simulation, analysis, and optimization activities, collaborating closely with Package and PCB Design teams and supporting customer board designs with Application Engineering. The role also includes measurement and model correlation for package and PCB materials.

Requirements

  • Bachelor’s or master’s degree in Electrical Engineering, or equivalent experience.
  • At least 4 years of experience as a signal integrity/power integrity engineer.
  • Good understanding of electromagnetics, channel components, and transmission line theory.
  • Experience designing and implementing one or more high-speed electrical interfaces, such as PCIe, LPDDR/DDR/GDDR, MIPI, HDMI, or USB.
  • Hands-on experience with HFSS, Sigrity, Hspice, or similar industry-standard simulation tools.
  • Experience with Cadence Allegro PCB Designer and Constraints Manager and/or other PCB stack-up design tools.
  • Understanding of the effects of high-volume PCB manufacturing on channel signal integrity.

Nice To Haves

  • Expertise in one or more high-speed interface SI/PI designs on industry-standard system platforms.
  • Exposure to package design, interface timing budgets, and system modeling.
  • Familiarity with high-speed transmitter and receiver design and various equalization schemes.
  • Familiarity with signaling schemes such as NRZ and PAM4.

Responsibilities

  • Lead board- and system-level signal integrity design activities, including PCB stack-up design, material selection, design guide implementation, layout review, and post-layout analysis.
  • Perform system-level signal integrity simulations for PCIe, LPDDR/DDR/GDDR, MIPI, HDMI, USB, and other interfaces.
  • Analyze and optimize PCB power delivery networks (PDNs).
  • Work with Package and PCB Design teams to develop solutions for system SI/PI performance.
  • Support customer board designs in collaboration with Application Engineering.
  • Perform TDR and VNA measurements for package/PCB material characterization and model correlation.

Benefits

  • Equity
  • Benefits
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