Senior Signal Integrity Engineer

NVIDIA•Santa Clara, CA
•$136,000 - $264,500

About The Position

NVIDIA is seeking a Senior Signal Integrity Engineer to work on its PHY IC product line, collaborating closely with NVIDIA sites in Israel and the USA. The team takes products from concept through design, implementation, verification, and release to customers, using advanced knowledge, technologies, and tools. This is a dynamic team working with state-of-the-art technology and tackling challenging goals. The role involves designing high-frequency channels up to 400Gb/s per lane for PCBs, packages, connectors, and cables; developing layout guidelines for NVIDIA systems; and simulating passive and active elements using 3D and 2D simulation tools. The engineer will work in an intense environment requiring control of multidisciplinary expertise. The position offers a base salary dependent on location, experience, and other objective job-related factors. Expected base salary ranges are $136,000–$218,500 for Level 3 and $168,000–$264,500 for Level 4. The employee will also be eligible for equity and benefits. Applications will be accepted at least until November 3, 2026. This posting is for an existing vacancy.

Requirements

  • B.Sc. in Electrical Engineering with a GPA above 90, or equivalent experience.
  • At least 5 years of experience.
  • Familiarity with electromagnetic waves, including transmission line theory.
  • Expert-level proficiency with electromagnetic tools such as Ansys EM and CST.
  • Experience with lab measurements, including VNA and TDR.
  • Ability to work in an intense environment and control multidisciplinary expertise.

Nice To Haves

  • M.Sc. or Ph.D. in Electrical Engineering.
  • PDN analyses, including model generation and time-domain simulation, and familiarity with NRZ/PAM-4 signaling schemes.
  • Experience with analyses involving co-simulation of circuits and PDN models.
  • Experience with MATLAB, Python, and C.
  • Exposure to TSV (Through-Silicon-Via) modeling and analysis.

Responsibilities

  • Design high-frequency channels up to 400Gb/s per lane for PCBs, packages, connectors, and cables.
  • Design layout guidelines for NVIDIA systems.
  • Simulate passive and active elements using 3D and 2D simulation tools.
  • Work in an intense environment and control multidisciplinary expertise.

Benefits

  • Equity
  • Benefits package
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