Distinguished Signal and Power Integrity Engineer

NVIDIA•Santa Clara, CA
•$320,000 - $488,750

About The Position

NVIDIA is seeking a Distinguished Signal and Power Integrity Engineer to lead corporate-level strategies and technical direction for high-speed signaling across advanced semiconductor packaging, sockets, and connectors. The role supports next-generation products ranging from ultra-mobile systems to high-performance AI and HPC platforms, and involves architecting interconnect and packaging solutions for standards and technologies including UCIe, HBM, DDR, PCIe, and 224G/448G SerDes. The engineer will enable advanced packaging solutions for co-packaged optics, stacked die, chiplet-based architectures, and IVR solutions. The position also covers development of modeling and characterization flows, flow automation, and design-for-high-volume-manufacturing techniques. As a recognized subject matter expert, the successful candidate will advise senior leadership on emerging technologies, investment, and research priorities in signaling, packaging, and system integration.

Requirements

  • 15+ years leading innovations in high-speed signal integrity, computational electromagnetics, and semiconductor assembly technologies.
  • MS or PhD in Electrical Engineering or equivalent, with 15+ years of industry experience.
  • Hands-on invention and deployment of advanced solutions such as EMIB, UCIe, CPO, or high-density connectors.
  • Deep experience in electrical, computer, and packaging engineering and deployment of these technologies in products.
  • Demonstrated ability to manage and mentor highly skilled engineering teams, define methodologies, and deliver complex projects from research to high-volume manufacturing.

Nice To Haves

  • Proven track record as an industry veteran bringing advanced signal-integrity concepts from research to product.
  • Recognition as a pioneer in an industry-standard high-speed signaling technology.
  • Deep knowledge of the operation and manufacturing challenges of package substrate, PCB, cables, and connectors.

Responsibilities

  • Lead development and execution of corporate-level strategies for high-speed signaling technologies across advanced semiconductor packaging, sockets, and connectors.
  • Oversee technical direction and implementation for next-generation products, from ultra-mobile to high-performance AI and HPC platforms.
  • Architect and deliver interconnect and packaging solutions for UCIe, HBM, DDR, PCIe, and 224G/448G SerDes.
  • Enable advanced packaging solutions for co-packaged optics, stacked die, chiplet-based architectures, and IVR solutions.
  • Develop modeling and characterization flows, flow automations, and design-for-high-volume-manufacturing techniques.
  • Provide strategic counsel to senior leadership on emerging technologies, technology investment, and research priorities in signaling, packaging, and system integration.
  • Manage and mentor highly skilled engineering teams, define methodologies, and deliver complex projects from research through high-volume manufacturing.

Benefits

  • Equity
  • Benefits
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