Senior Mixed Signal Design Engineer

NVIDIA•Santa Clara, CA

4d•$168,000 - $310,500

About The Position

NVIDIA is seeking a Senior Mixed-Signal/Analog/IO Circuit Develop Engineer to join a growing team developing high-speed DRAM SerDes solutions. The role focuses on mixed-signal and analog circuit design for high-speed memory I/O interfaces using the latest CMOS FinFET processes. The engineer will take designs through productization, participate in all stages of development, collaborate with multifunctional teams to optimize designs, and contribute to architecture definition and development for next-generation memory systems and interfaces.

Requirements

MS or PhD in Electrical Engineering, or equivalent experience.
At least 4 years of well-rounded high-speed DRAM (LPDDR5/6, DDR4/5, GDDR5/6/7, HBM3/4) or other SerDes interface-related design experience.
In-depth understanding of deep submicron CMOS FinFET processes and related circuit design issues.
Familiarity with device reliability, ESD, and Latch-Up requirements.
Understanding of system-level timing budgets, specifications, and analysis.
Strong background with Cadence custom design tools and circuit simulators such as Hspice, XA, FineSim, and Spectre.

Nice To Haves

Understanding of package substrate, board design, and power delivery.
Knowledge of Verilog, Nanotime, Matlab, or similar tools.
Hands-on experience with silicon debug using laboratory test and measurement equipment.

Responsibilities

Design mixed-signal and analog circuits for high-speed memory I/O interfaces.
Solve circuit design challenges in the latest CMOS FinFET processes.
Take designs through productization and participate actively in all stages of development.
Work with multifunctional teams to optimize the design.
Contribute to architecture definition and development of next-generation and future memory systems and interfaces.