Senior ASIC Design Verification Engineer - Slingshot
About The Position
Hewlett Packard Enterprise is hiring a Senior Design Verification Engineer to work on the switch and NIC ASICs for a future generation of HPE Slingshot, an interconnect used in large high-performance computing and AI systems. The engineer will collaborate with architects, logic designers, and verification engineers, own significant verification scope, set technical direction for a block or subsystem, and help shape the team's use of emerging agentic AI workflows. The role covers all phases of pre-silicon design verification, including methodology, test planning and testbench development, coverage closure, and sign-off reviews. It is hybrid, with an average requirement of two days per week in an HPE office in Chippewa Falls, Wisconsin; Fort Collins, Colorado; or Bloomington, Minnesota.
Requirements
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.
- 10 or more years of experience in VLSI design, verification, or implementation.
- Expert-level knowledge of SystemVerilog and OVM or UVM methodologies.
- Expert-level knowledge of programming and scripting languages, hardware description languages, electronic design automation (EDA), and/or FPGA tools.
- Expert-level analytical and problem-solving skills.
- Ability to excel in a distributed team environment.
- Executive-level written and verbal communication skills and mastery of English.
Nice To Haves
- Experience verifying high-speed networking, switching, or NIC ASICs.
- Experience with agentic AI coding tools and workflows applied to verification.
- Experience with Python, Perl, Tcl, or another scripting language in Linux development environments.
- Experience working as part of a geographically distributed team.
Responsibilities
- Follow and help define the team's design verification methodology.
- Develop SystemVerilog and UVM testbench components, including bus functional models that drive and monitor stimulus.
- Plan and implement block- and integration-level scoreboards and checkers to verify functional behavior.
- Write and analyze functional coverage and provide input to block-level milestones.
- Triage regression failures, identify logic bugs, and drive bug closure.
- Apply scripting, automation, and AI-assisted and agentic tools to improve verification speed and quality.
- Guide and mentor less experienced staff and model VLSI design and development innovation and excellence.
- Participate in and provide input to the process for selecting future technical leaders.
- Drive VLSI innovation and integrate new technologies into projects and design organization activities.
- Participate in pre-silicon design verification through methodology, test-plan and testbench development, coverage closure, and sign-off reviews.
Benefits
- A comprehensive suite of benefits supporting physical, financial, and emotional wellbeing.
- Career and professional development programs.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
