Principal Silicon Architect

Microsoft•Redmond, WA
•$142,800 - $304,200

About The Position

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) develops the core infrastructure and foundational technologies supporting Microsoft’s online businesses and Azure platform. The AI Silicon Engineering team helps define and deliver operational measures for hardware manufacturing, planning, quality, delivery, scale, and sustainability related to Microsoft cloud hardware. The Principal Silicon Architect provides technical leadership across ASIC and SoC development, with a primary focus on early architecture definition and specifications for Network-on-Chip (NoC), memory, and interconnect subsystems in high-performance AI and compute SoCs. The role defines system-level address maps, memory hierarchies, and connectivity; translates product performance objectives into scalable architectures; evaluates third-party IP, silicon technologies, and vendor solutions; and works with performance, hardware, firmware, software, and system architecture teams. The architect guides design and verification, supports pre- and post-silicon activities, and leads technical reviews and system-level design decisions.

Requirements

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field and 3+ years of technical engineering experience; or a master’s degree in one of these fields and 6+ years of technical engineering experience; or a bachelor’s degree in one of these fields and 8+ years of technical engineering experience; or equivalent experience.
  • Ability to meet Microsoft, customer, and/or government security screening requirements, including passing the Microsoft Cloud Background Check upon hire or transfer and every two years thereafter.
  • Must provide proof of citizenship, U.S. residency, or other protected status for assessment of eligibility to access export-controlled information; citizenship will be verified with a valid passport, with other applicable documents accepted for lawful permanent residents, refugees, and asylees.

Nice To Haves

  • 10+ years of architecture and design experience in large-scale SoCs.
  • Understanding of on-chip interconnect and memory hierarchy.
  • Experience with SoC architecture.
  • Track record of successful design of IPs and SoCs.
  • Experience with caches and cache coherency.
  • Experience with SoCs used in data centers.
  • Experience with security, die-to-die interconnect, debug, telemetry, boot/reset, and RAS.

Responsibilities

  • Provide technical leadership throughout ASIC and SoC development, particularly early architecture definition and specification of NoC, memory, and interconnect subsystems for high-performance AI and compute SoCs.
  • Define system-level address maps, memory hierarchy, and SoC connectivity; translate product performance objectives into scalable NoC, memory, and data-movement architectures.
  • Evaluate third-party IP, silicon technologies, and vendor solutions, making recommendations that balance performance, power, area, schedule, and risk.
  • Partner with performance modeling and analysis teams to define requirements, develop architectural models, and identify system bottlenecks early in the design cycle.
  • Collaborate with hardware, firmware, software, and system architecture teams to ensure architectural alignment and successful feature integration.
  • Guide design and verification teams to ensure implementation fidelity to architectural intent and requirements.
  • Support pre-silicon validation, post-silicon bring-up, and performance characterization to ensure features meet functional and performance goals.
  • Drive cross-functional technical reviews, resolve complex architectural issues, and lead critical design tradeoffs and system-level decisions.
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service