Principal Engineer, Silicon Validation

Ayar Labs • San Jose, CA

1d

About The Position

Lead silicon validation for optical chiplets, defining and driving the validation strategy from initial silicon power-on through block- and chip-level signoff. The role applies expertise in high-speed SerDes, photonic systems, and post-silicon validation to optical interconnect for next-generation AI infrastructure. It includes leading first-silicon bring-up, validating electronic-photonic SoCs and their interfaces and mixed-signal blocks, debugging silicon failures, and guiding validation engineers. The engineer also establishes validation targets and signoff criteria based on industry standards and maintains comprehensive validation documentation.

Requirements

• Bachelor's degree in Electrical Engineering or a related field with at least 10 years of relevant industry experience, or a master's degree with at least 7 years of experience.
• Demonstrated leadership in post-silicon validation for complex SoCs or multi-chip packages, including first-silicon bring-up and full signoff.
• Hands-on expertise in high-speed SerDes validation and characterization, including NRZ and PAM-4, using equipment such as BERTs, oscilloscopes/DCAs, and network analyzers.
• Strong proficiency in Python for laboratory automation, data analysis, and test-infrastructure development.
• Experience developing and owning validation test plans end-to-end.
• Deep understanding of communication protocols and standards such as Ethernet and PCIe.
• Excellent communication skills and ability to drive cross-functional technical alignment.

Nice To Haves

• Familiarity with optical transceiver standards and co-packaged optics integration challenges.
• Knowledge of high-speed standards including Ethernet 200G/400G/800G, PCIe Gen5/6, and OIF CEI.
• Experience driving NPI and transition from laboratory validation to manufacturing test.

Responsibilities

• Define and implement validation methodologies for electronic-photonic SoCs, covering initial bring-up, functional validation, electrical characterization, and system-level testing.
• Develop detailed test plans and success criteria, and select appropriate test equipment and methodologies.
• Lead first-silicon power-on and bring-up for new tape-outs, collaborating with firmware and design teams to establish operating conditions and validate core functionality.
• Perform post-silicon validation of SerDes interfaces, optical control loops, and mixed-signal blocks using laboratory equipment.
• Apply industry standards and semiconductor validation best practices to establish validation targets, coverage objectives, and signoff criteria.
• Investigate silicon failure modes, including signal-integrity issues and mixed-signal anomalies, and drive them to resolution with design and firmware teams.
• Provide technical leadership and mentorship to senior and junior validation engineers, guiding the team's technical execution.
• Create and maintain validation reports, signoff packages, and product-performance documentation.

What This Job Offers

• Job Type: Full-time
• Career Level: Principal