MTS Silicon Design Engineer

Advanced Micro Devices, Inc•San Jose, CA

About The Position

Xilinx, Inc., a subsidiary of AMD, Inc., is hiring an MTS Silicon Design Engineer to research, design, develop, and/or test electronic components and systems for semiconductor and related device manufacturing. The role involves overseeing ASIC development definition, design, verification, and documentation; determining architecture and logic design; and conducting system simulation. The engineer defines module interfaces and formats for simulation and leads multidimensional designs involving complex integrated-circuit layouts. The position evaluates the full process flow, from high-level designs through synthesis, place and route, timing, and power use. It collaborates with cross-functional engineering teams on ASIC and layout design, handles complex issues requiring in-depth evaluation of variable factors, and drives projects or processes of significant technical importance. The engineer independently selects methods, techniques, and evaluation criteria, and applies knowledge of electronic systems and engineering principles to resolve complex issues and design, develop, and test company products. Multiple openings are available. Travel is not required.

Requirements

  • Master’s degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronic Engineering, or a related field, plus three years of experience in the job offered or a closely related engineering role.
  • Alternatively, a Bachelor’s degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronic Engineering, or a related field, plus five years of progressive, post-baccalaureate experience in the job offered or a closely related engineering role.
  • Three years of experience designing digital circuits and components using Verilog or SystemVerilog.
  • Three years of experience debugging in digital and mixed-signal simulation environments.
  • Three years of experience with multi-clock-domain designs.
  • Three years of experience with design constraints for synthesis and static timing analysis.
  • Three years of experience with logic synthesis, timing closure, logical equivalence checking, and ECOs.
  • Three years of experience collaborating with verification, DFT, and physical design teams.
  • Three years of experience with RTL design and functional block development using Verilog or SystemVerilog.
  • Three years of experience with logic optimization and area-reduction techniques.
  • Three years of experience with firmware or hardware interaction.
  • Three years of experience with timing-constraint development and static timing analysis.
  • Three years of experience with CDC or RDC analysis, debugging, and resolution.
  • Three years of experience with assertion-based verification.
  • Three years of experience with formal verification.
  • Three years of experience with silicon debugging.
  • Three years of experience using industry-standard EDA tools for Front-End design.

Responsibilities

  • Research, design, develop, and/or test electronic components and systems for semiconductor and related device manufacturing.
  • Oversee the definition, design, verification, and documentation of ASIC development.
  • Determine architecture design and logic design, and perform system simulation.
  • Define module interfaces and formats for simulation.
  • Lead multidimensional designs involving the layout of complex integrated circuits.
  • Evaluate process flow from high-level designs through synthesis, place and route, timing, and power use.
  • Work with cross-functional engineering teams on ASIC and layout design.
  • Drive projects or processes of significant technical importance.
  • Select methods, techniques, and evaluation criteria independently to obtain results.
  • Apply engineering principles, best practices, and technologies to design, develop, and test company products.
  • Resolve complex issues using knowledge of computers, electronics, and design techniques, tools, and principles.

Benefits

  • AMD benefits are referenced as described in “AMD benefits at a glance”; specific benefits are not listed in the posting.
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