Module Development Engineer (Ph.D.) - Intel Foundry

Intel•Hillsboro, OR

14h•$133,800 - $188,890

About The Position

Intel Logic Technology Development designs and scales advanced semiconductor process technologies for future generations of Intel architecture. The Module Development Engineer drives the development, optimization, and characterization of leading-edge semiconductor processes, and supports their transfer into high-volume manufacturing. Relevant areas include patterning and removal; thin films and doping; and metrology, yield, and integration. The role may involve lithography, overlay, wet or dry etch, CMP, epitaxy, thin-film deposition, diffusion, ion implantation, metals, dielectrics, in-line metrology, FEOL/BEOL integration, defect reduction, yield analysis, or electrical characterization. The engineer designs and executes experimental runs to advance processes, equipment hardware, and material capabilities. They apply statistical modeling, Design of Experiments, and process-control systems to reduce variability, mitigate defects, and improve yield. The role collaborates with external tool and material suppliers and internal integration teams to develop equipment and process methodologies, investigates equipment, process, and yield excursions to support robust technology transfer into high-volume manufacturing, and documents findings, procedures, and technical recommendations in reports and presentations. The position is based in Hillsboro, Oregon. The posting lists an annual US salary range of $133,800 to $188,890, with individual compensation dependent on location and job-related factors. Intel describes its total compensation package as including competitive pay, stock bonuses, and health, retirement, and vacation benefit programs.

Requirements

Ph.D. in Electrical Engineering, Chemical Engineering, Materials Science and Engineering, Physics, Mechanical Engineering, Chemistry, or a related STEM field; the degree must be completed before the start date.
At least 6 months of experience in semiconductor fabrication, process development, device research, materials research, or related semiconductor technology. Experience may come from academic coursework, laboratory research, thesis work, internships, postdoctoral work, or publications.
Hands-on experience in at least one relevant area, such as lithography or overlay, epitaxy, wet or dry etch, thin-film deposition, diffusion, ion implantation, CMP or planarization, metals or metallization, dielectrics, metrology, process integration, yield, or electrical characterization.

Nice To Haves

At least 6 months of cleanroom or semiconductor research-lab experience working directly with fabrication or analytical instrumentation, such as ALD, CVD, PVD, plasma etch, CD-SEM, TEM, AFM, or spectroscopic ellipsometry.
At least 6 months using statistical methodologies such as DOE or SPC and engineering software or scripting languages such as Python, MATLAB, JMP, or C# for data analysis and automation.
Academic or research specialization in transistor architecture, advanced semiconductor materials, or FEOL/BEOL process integration.
A record of presenting technical findings through dissertations, peer-reviewed publications, conference proceedings, patents, or white papers.

Responsibilities

Design, execute, and optimize experimental runs to advance semiconductor processes, equipment hardware, and new material capabilities.
Apply statistical modeling, Design of Experiments (DOE), and control systems such as SPC, APC, and Run-to-Run to reduce variability, mitigate defects, and enhance yield.
Collaborate with external tool and material suppliers and internal integration teams to develop equipment and process methodologies.
Resolve equipment, process, and yield excursion root causes to support technology transfer from development into high-volume manufacturing.
Document experimental findings, operating procedures, and technical recommendations through engineering reports and presentations.