Intel Foundry Module Development Engineer (Ph.D.)

Intel Corporation•Hillsboro, OR

1d•$133,800 - $188,890

About The Position

Intel Logic Technology Development (LTD) designs and scales advanced semiconductor process technologies for future generations of Intel architecture. The Module Development Engineer drives the development, optimization, and characterization of leading-edge semiconductor processes and their transfer to high-volume manufacturing (HVM). Process areas include patterning and removal (lithography, overlay, wet etch, dry/plasma etch, and CMP); thin films and doping (epitaxy, ALD/CVD/PVD deposition, diffusion, ion implantation, metals/metallization, and dielectrics); and metrology, yield, and integration (in-line metrology, FEOL/BEOL integration, defect reduction, yield analysis, and electrical characterization). Candidates must have a Ph.D. in a relevant STEM discipline, expected before the start date, and at least six months of relevant hands-on experience. Relevant experience may come from coursework, laboratory research, thesis work, internships, postdoctoral work, or publications.

Requirements

Ph.D. in Electrical Engineering, Chemical Engineering, Materials Science and Engineering, Physics, Mechanical Engineering, Chemistry, or a related STEM field, with completion expected before the start date.
At least 6 months of hands-on experience in semiconductor fabrication, process development, device research, materials research, or related semiconductor technology.
Relevant experience must include one or more of the following areas: lithography/overlay, epitaxy, wet etch, dry etch, thin-film deposition, diffusion, ion implantation, CMP/planarization, metals/metallization, dielectrics, metrology, process integration, yield, or electrical characterization.

Nice To Haves

At least 6 months in a cleanroom or semiconductor research laboratory working directly with fabrication or analytical instrumentation, such as ALD, CVD, PVD, plasma etch, CD-SEM, TEM, AFM, or spectroscopic ellipsometry.
At least 6 months using statistical methodologies such as DOE or SPC and engineering software or scripting languages such as Python, MATLAB, JMP, or C# for data analysis and automation.
Academic or research specialization in transistor architecture, advanced semiconductor materials, or FEOL/BEOL process integration.
A demonstrated record of presenting technical findings through dissertations, peer-reviewed publications, conference proceedings, patents, or white papers.

Responsibilities

Design, execute, and optimize experimental runs to advance semiconductor processes, equipment hardware, and new material capabilities.
Apply statistical modeling, Design of Experiments (DOE), and process control systems such as SPC, APC, and Run-to-Run to reduce variability, mitigate defects, and enhance yield.
Collaborate with external tool and material suppliers and internal integration teams to co-develop equipment and process methodologies.
Resolve equipment, process, and yield-excursion root causes to support robust transfer of technology from development into high-volume manufacturing.
Document experimental findings, operating procedures, and technical recommendations in engineering reports and presentations.