Head of Silicon Product Engineering

Normal Computing Corporation • Palo Alto, CA

6d

About The Position

Normal Computing is an applied AI company building foundational hardware and software for the semiconductor industry, AI infrastructure, and other systems. The company works across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.

The Head of Silicon Product Engineering will own the work between silicon design completion and a real, manufacturable product. This includes packaging, test and ATE, post-silicon validation and bring-up, yield and qualification, OSAT and test-house selection, and production calibration and screening for memory products. The role will establish the team, vendor relationships, and processes needed to take silicon from tape-out through high-volume manufacturing, partnering across design, manufacturing, and product. It will also establish test and calibration methodology as a new silicon program develops toward volume.

Requirements

• 15+ years in semiconductor product or test engineering, with direct ownership of silicon from NPI through high-volume manufacturing.
• Proven experience selecting and managing OSAT and foundry partners, including cost, quality, and yield negotiations.
• Deep hands-on background in packaging, ATE, and post-silicon bring-up and validation.
• Experience with production test and screening methodology for complex, high-reliability products.
• A track record of building and scaling engineering teams from an early stage.
• Strong cross-functional fluency with design, architecture, and supply chain organizations.
• Bachelor’s or Master’s degree in Electrical Engineering or a related field.

Nice To Haves

• Experience bringing up test and qualification for a new or unconventional silicon architecture, rather than only a new generation of a familiar architecture.
• Experience with memory-adjacent product engineering, such as DRAM, HBM, or custom memory modules.
• Experience at an AI or high-performance-compute startup where design, verification, and product engineering worked in tight iteration cycles.
• Comfort working in an environment where test methodology is being invented alongside the hardware.

Responsibilities

• Own end-to-end post-silicon bring-up, characterization, validation, and debug across multiple silicon generations.
• Define and drive packaging and test strategy, including ATE program development, test coverage, and test-condition optimization for yield, quality, and performance.
• Select, qualify, and manage OSAT and test-house partners through NPI and high-volume manufacturing, including cost, quality, and yield negotiations.
• Lead yield learning and qualification from early silicon through production ramp, including root-cause analysis of systematic and random failures.
• Own production calibration and screening methodology for memory products to ensure performance and reliability targets are met at volume.
• Build and lead a silicon product engineering organization, including hiring, processes, and tooling.
• Partner with design, architecture, and supply chain teams to ensure designs are producible, testable, and optimized for cost and yield.
• Build data analysis practices to identify failure mechanisms early using characterization and manufacturing data from wafer acceptance testing, sort, package, and system-level test.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior