Formal Verification Engineer

Apple•Austin, TX

About The Position

As a Formal Verification Engineer in Apple’s Silicon Technologies group, you will perform formal verification for one or more design blocks and IPs, such as CPU, GPU, cellular and connectivity, audio and image processing, neural networks, memory/DMA controllers, security, peripherals, interconnects, and power-management subsystems. You will collaborate with design engineers on SoC design verification, helping deliver high-quality, functional products.

Requirements

  • Bachelor’s degree.
  • At least 3 years of relevant industry experience in silicon validation, software engineering, or a related field.

Nice To Haves

  • Interest in learning and becoming an expert in SoC, CPU, GPU, or cellular design.
  • Knowledge of formal methods or formal verification technologies.
  • Knowledge and experience interpreting hardware specifications.
  • Proficiency in a scripting language and excellent debugging skills.
  • Excellent interpersonal skills.
  • Passion for developing innovative, world-class formal verification solutions.
  • Detail-oriented approach and desire to overcome challenges.

Responsibilities

  • Work with Apple Silicon design engineers to develop formal micro-architecture specifications.
  • Develop comprehensive formal verification test plans that include verification of unique security requirements.
  • Prove design properties, find design bugs, and work with design teams to improve micro-architecture.
  • Create solutions for modeling security attacks and proving the robustness of complex design micro-architectures.
  • Develop and implement reusable, optimized formal models and verification code.
  • Architect correct-by-construction design methodologies to improve formal verification efficiency and productivity.
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