FE Engineer

Apple • San Diego, CA

2d

About The Position

Apple Inc. has an FE Engineer position available in San Diego, California. The role involves microarchitecture definition; RTL design in SystemVerilog/Verilog; IP integration and verification; low-power RTL design and RTL power analysis; lint and clock-domain-crossing (CDC) checks; synthesis and timing constraints; and collaboration with system, algorithm, and firmware teams to support performance and power efficiency. The position is 40 hours per week.

Requirements

• Master's degree or foreign equivalent in Electrical Engineering, Electronics Engineering, Communication Engineering, or a related field.
• Three years of experience in the job offered or a related occupation.
• Experience and/or education using SystemVerilog or Verilog to write RTL for high-speed communication IPs.
• Experience and/or education using scripting languages such as Python, Perl, or TCL, including automating RTL integration and verification, synthesis, and timing analysis.
• Experience and/or education using CDC and RDC tools or techniques, understanding multiple clock and reset domains, and fixing related issues.
• Experience in RTL design with complex FSMs and power-saving features.
• Experience in IP integration, including clock/reset module design, clock-gating implementation, and fabric/bus system configuration and design.
• Knowledge of low-power design concepts and implementation, including clock gating, power gating, and DVFS.
• Knowledge of high-speed interfaces and design, including AXI/AHB buses and peripherals.
• Experience using Synopsys and Cadence synthesis tools, setting constraints, and knowledge of LEC/LEQ.
• Understanding of computer architecture and SoCs.
• Knowledge of and experience with wireless communication.

Responsibilities

• Define microarchitecture.
• Design RTL using SystemVerilog/Verilog.
• Integrate and verify IP.
• Design low-power RTL and run RTL power-analysis tools.
• Run tools to ensure designs are lint-free and CDC-clean.
• Perform synthesis and define timing constraints.
• Collaborate with system, algorithm, and firmware teams to support performance and power efficiency.

Benefits

• Opportunity to participate in discretionary employee stock programs, including restricted stock unit awards.
• Opportunity to purchase Apple stock at a discount through the Employee Stock Purchase Plan, subject to eligibility and program terms.
• Comprehensive medical and dental coverage.
• Retirement benefits.
• Discounted products and free services.
• Reimbursement for certain education expenses, including tuition, for formal education related to career advancement at Apple.
• The role might be eligible for discretionary bonuses or commission payments.
• The role might be eligible for relocation.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level