FE Engineer

Apple • Austin, TX

3d • Onsite

About The Position

Apple Inc. has an available FE Engineer position in Austin, Texas. The role works closely with Architecture to understand design performance goals, correlates RTL performance against model performance, and performs detailed analysis to identify and report performance findings. The engineer identifies design performance bottlenecks and coordinates with the Architecture team to improve performance. The role also defines performance statistics and standard methodologies to support performance debugging and improve performance correlation efforts. The engineer is expected to work independently, lead their work in alignment with project goals, collaborate effectively, and support multifunctional engineering efforts. The position is 40 hours per week.

Requirements

• Bachelor's degree or foreign equivalent in Computer Engineering, Electrical Engineering, or a related field.
• Understanding of computer architecture, including cache behavior and basic CPU operations, to analyze performance in complex SoCs.
• Ability to read and write Verilog and SystemVerilog and develop or modify UVM testbenches.
• Python or Perl scripting skills to analyze data and interpret large datasets, including experience with automation and creating custom reports and internal tools.
• Experience leading collaborations among Design, DV, and Architecture stakeholders to implement test plans and debug performance shortfalls.
• Experience using Excel and creating CSV files and data for data visualization.
• Understanding of SoC fabric/interconnect design and tradeoffs for optimizing bandwidth, latency, and Quality-of-Service metrics.
• Engineering and problem-solving skills to work with other engineers to design experiments that isolate issues.
• Experience debugging waveforms using Verdi or Indago to analyze cycle-by-cycle operations of complex state machines.
• Strong interpersonal skills and ability to work independently.

Responsibilities

• Work with Architecture to understand design performance goals.
• Correlate RTL performance against model performance.
• Perform in-depth performance analysis and report findings.
• Identify design performance bottlenecks and coordinate with Architecture to improve performance.
• Define performance statistics to support performance debugging.
• Develop standard methodologies to improve performance correlation.
• Lead work in alignment with project goals and support multifunctional engineering efforts.
• Collaborate with Design, DV, and Architecture stakeholders to implement test plans and debug performance shortfalls.
• Design experiments with other engineers to isolate issues.

What This Job Offers

• Job Type: Full-time