DRAM Pathfinding & Process Integration Engineer

Micron•Albany, NY
•$159,000 - $271,000•Onsite

About The Position

Micron Technology is hiring a DRAM Pathfinding & Process Integration Engineer for its DRAM Technology Development team at the NY CREATES Albany NanoTech Complex. The role leads early-phase technology investigation and process integration for next-generation DRAM architectures, defining structural, electrical, reliability, design-rule, and manufacturability requirements and translating them into coordinated process solutions. The engineer works across device engineering, lithography, dry etch, thin films, CMP, metrology, modeling, and manufacturing teams to assess technology options, accelerate learning, and reduce technical risk before concepts enter formal development programs. The position focuses on advanced patterning, novel materials, new device architectures, and High-NA EUV lithography. It includes planning and analyzing technology learning experiments, applying statistical and AI-assisted analytics, and communicating technical findings and recommendations to technical and business leadership. The role also partners with NY CREATES, equipment suppliers, research institutions, and Micron’s global development teams to evaluate emerging capabilities and support joint development while safeguarding Micron intellectual property. The engineer supports the transition of successful pathfinding concepts into technology development and production, aligning development, integration, and manufacturing organizations and documenting key learning, assumptions, risks, and recommendations. The Albany team supports Micron’s High-NA EUV and next-generation memory pathfinding within the NY CREATES research ecosystem. This is a full-time position based at the Albany NanoTech Complex. The listed US base salary range is $159,000 to $271,000 per year; additional compensation may include benefits, bonuses, and equity.

Requirements

  • Master’s degree or equivalent experience in Electrical Engineering, Physics, Materials Science, Chemical Engineering, or a related technical field.
  • At least 5 years of semiconductor industry experience in process integration, process development, device engineering, or advanced R&D.
  • Strong understanding of memory technologies, including DRAM, NAND, SRAM, and emerging memory architectures.
  • Extensive knowledge of semiconductor device physics and process integration.
  • Experience with DOE methodologies, statistical analysis, and technical problem-solving.
  • Proven ability to influence and collaborate across multidisciplinary engineering teams.
  • AI proficiency or experience with AI-enabled ways of working.

Nice To Haves

  • Ph.D. or equivalent experience in Electrical Engineering, Physics, Materials Science, or a related subject area.
  • Experience in DRAM technology innovation and advanced memory scaling challenges.
  • Familiarity with EUV and High-NA EUV lithography.
  • Experience with technology scouting, process architecture formulation, or advanced process integration.
  • Experience working within semiconductor consortia, supplier partnerships, or research teams.
  • Familiarity with Python, JMP, SQL, machine learning, and advanced analytics tools.
  • Proven success leading technical initiatives involving multifunctional teams in fast-paced development environments.

Responsibilities

  • Lead investigation of upcoming DRAM technology concepts, materials, and process architectures.
  • Assess scaling approaches using High-NA EUV and advanced patterning technologies.
  • Develop technology learning plans and evaluation approaches to accelerate development decisions.
  • Develop technical knowledge that informs Micron’s future memory technology roadmap.
  • Develop and integrate novel process flows for next-generation DRAM technologies.
  • Establish structural, electrical, reliability, and design-rule criteria for advanced memory architectures.
  • Lead process improvement efforts across lithography, etch, films, CMP, metrology, and device engineering teams.
  • Balance performance, manufacturability, yield, reliability, and cost objectives.
  • Partner with lithography and process development teams to enable future High-NA EUV patterning solutions.
  • Evaluate process interactions affecting pattern fidelity, overlay performance, stochastic defectivity, and yield.
  • Identify integration needs for upcoming DRAM scaling approaches.
  • Work with suppliers and research partners to evaluate emerging lithography capabilities.
  • Build and complete DOE plans and technology learning experiments.
  • Analyze electrical, defectivity, metrology, reliability, and yield data using statistical methodologies.
  • Use AI-assisted analytics and modeling techniques to accelerate process learning.
  • Communicate technical findings, risks, tradeoffs, and strategic recommendations to technical and business leadership.
  • Work directly with NY CREATES, equipment suppliers, and strategic research collaborators.
  • Lead technical discussions about future technology requirements and capability development.
  • Support joint development activities while safeguarding Micron intellectual property.
  • Influence investment and development priorities through technical leadership.
  • Support transition of successful pathfinding concepts into technology development and production.
  • Align development, integration, and manufacturing organizations.
  • Document critical learning, technical assumptions, risks, and recommendations.
  • Ensure technology preparedness for upcoming DRAM generations.

Benefits

  • Medical, dental, and vision plans.
  • Programs to protect income in the event of illness or injury.
  • Paid family leave.
  • Paid time off.
  • Paid holidays.
  • Additional compensation may include bonuses and equity.
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