Design Verification Engineer

Microsoft • Raleigh, NC

6h

About The Position

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) builds and operates infrastructure and foundational technologies for Microsoft’s online businesses and Azure platform. The Compute Silicon & Manufacturing Engineering (CSME) organization designs, develops, manufactures, and packages Microsoft computer chips, including Azure Cobalt. Its work supports reliable, high-volume, high-quality, cost-effective deployment of cloud hardware and operational goals related to quality, delivery, scale, and sustainability.

The Design Verification Engineer will join a pre-silicon verification and post-silicon validation team developing custom silicon components. The role involves creating verification environments and stimulus, developing verification IP and UVM components, implementing functional coverage, and collaborating across engineering and vendor teams to ensure comprehensive pre- and post-silicon testing. The position also develops scripts for verification and validation infrastructure.

Requirements

• Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field and at least 1 year of technical engineering experience; or bachelor's degree in one of these fields and at least 2 years of technical engineering experience; or equivalent experience.
• Ability to meet Microsoft, customer, and/or government security screening requirements, including the Microsoft Cloud Background Check upon hire or transfer and every two years thereafter.
• Must satisfy export-control eligibility requirements and provide proof of citizenship, U.S. residency, or other protected status as applicable; citizenship will be verified with a valid passport, with other documents accepted for lawful permanent residents, refugees, and asylees where applicable.

Nice To Haves

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field; or a master's degree in one of these fields and at least 3 years of technical engineering experience; or a bachelor's degree in one of these fields and at least 5 years of technical engineering experience; or equivalent experience.
• At least 3 years of pre-silicon System on Chip (SoC), chip-level, subsystem, or IP verification experience.
• At least 3 years of experience with verification principles, object-oriented programming, test plan development, testbench creation, stimulus generation, UVM/OVM, and coverage-based verification.
• At least 3 years of experience with SystemVerilog, C/C++, and scripting languages such as Python, Ruby, or Perl.
• Demonstrated experience with one or more of the following: coherency, caches, fabrics, DDR controllers, PCIe, CXL, AXI/CHI protocol bridges, or other complex IP, blocks, or subsystems.
• Experience with a full product cycle from definition to silicon, including writing IP/block or subsystem-level test plans, developing tests, debugging failures, and coverage signoff.
• Experience creating, maintaining, or integrating test benches, checkers, and stimulus using SVTB, UVM, Formal Verification, and/or C/C++.
• Experience automating verification processes using Python or another scripting language.

Responsibilities

• Contribute as an integral member of a pre-silicon verification and post-silicon validation team developing custom silicon components.
• Write constrained-random stimulus, scoreboards, checkers, and assertions to verify design correctness.
• Develop Verification IP (VIP) components for verifying in-house designs.
• Develop Universal Verification Methodology (UVM) components that interface test code with verification simulation environments.
• Define and implement functional coverage and drive coverage closure.
• Collaborate with Architecture, Design, Firmware/Software, Product Engineering, Program Management, and third-party vendor teams to ensure comprehensive pre- and post-silicon testing.
• Develop scripts for verification and validation infrastructure.
• Embody Microsoft's Culture and Values.

Benefits

• The job posting states that certain roles may be eligible for benefits and other compensation, but does not specify which benefits apply to this position.

What This Job Offers

• Job Type: Full-time
• Career Level: Entry Level