Design Verification Engineer

Apple • Cupertino, CA

2d

About The Position

Apple Inc. is hiring a Design Verification Engineer to work closely with architecture and RTL designers to verify design functionality and correctness. The role involves developing and leading test plans and test environments; creating complex tests in assembly, C, or vectors; developing coverage monitors and analyzing coverage to ensure test-plan cases are covered; and developing checkers or C-based transactors to verify designs. The position is based in Cupertino, California, and various unanticipated locations throughout the USA, and is 40 hours per week.

The role requires a master’s degree or foreign equivalent in Computer Engineering, Electrical Engineering, or a related field. Relevant experience and/or education must cover CPU architecture and system-level behavior, testbench and checker development, coverage-driven verification, failure analysis and debugging, advanced validation methods, and verification of modern CPU features and predictors.

The stated base pay range is $174,149–$225,300 per year. Apple also describes discretionary employee stock programs, comprehensive medical and dental coverage, retirement benefits, discounted products and free services, reimbursement for certain education expenses, and possible discretionary bonuses or commission payments and relocation. Benefits and compensation are subject to applicable eligibility requirements and plan terms.

Requirements

• Master’s degree or foreign equivalent in Computer Engineering, Electrical Engineering, or a related field.
• Understanding of CPU architecture and system-level behavior to architect robust, high-quality verification strategies.
• Experience and/or education applying root-cause failure analysis, waveform and log debugging, and targeted RTL or testbench fixes.
• Experience and/or education in testbench development, including transactors, bus functional models (BFMs), and protocol agents.
• Experience and/or education designing and deploying architectural and micro-architectural checkers.
• Experience and/or education owning coverage-driven verification, including functional, assertion, and cross-coverage analysis.
• Experience and/or education applying formal property verification, hardware emulation, and FPGA/SoC bring-up flows.
• Experience and/or education with verification languages and tools such as C++, SystemVerilog, Python, or Verdi.
• Knowledge of processor security vulnerabilities such as Spectre or Meltdown.
• Experience and/or education developing directed and constrained-random stimulus for CPU components and performance scenarios.
• Understanding of RTL for modern CPU predictors, including TAGE branch predictors, and developing golden models to verify designs.

Responsibilities

• Work with architecture and RTL designers to verify design functionality and correctness.
• Develop and lead test plans and test environments.
• Develop complex tests in assembly, C, or vectors according to test plans.
• Develop coverage monitors and analyze coverage to ensure test-plan cases are covered.
• Develop checkers or C-based transactors to verify designs.
• Apply root-cause failure analysis, waveform and log debugging, and drive targeted RTL or testbench fixes.
• Develop testbench components, including transactors, bus functional models (BFMs), and protocol agents.
• Design and deploy architectural and micro-architectural checkers to detect corner cases.
• Own coverage-driven verification, including functional, assertion, and cross-coverage analysis, to sign off verification completeness.
• Apply formal property verification, hardware emulation, and FPGA/SoC bring-up flows to find corner-case bugs.
• Develop directed and constrained-random stimulus to stress CPU pipelines, predictors, ALUs, register files, hazard units, crossbars, and performance scenarios.
• Develop a golden model and verify modern CPU predictors, including TAGE branch predictors.

Benefits

• Comprehensive medical and dental coverage.
• Retirement benefits.
• Discounted products and free services.
• Reimbursement for certain educational expenses, including tuition, for formal education related to advancing a career at Apple.
• Opportunity to participate in discretionary employee stock programs, including restricted stock unit awards and discounted Apple stock through the Employee Stock Purchase Plan, subject to eligibility and plan terms.
• May be eligible for discretionary bonuses or commission payments.
• May be eligible for relocation.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level