Design Verification Engineer

Apple • Cupertino, CA

2d

About The Position

Apple Inc. is hiring a Design Verification Engineer to ensure the quality of silicon for IC chips and IPs. The role reviews specifications, develops verification plans, and executes verification activities to support tape-out. It verifies power-management IP, including mixed-signal circuits, LDOs, data converters, references, input-output circuits, and clock circuits. The engineer verifies mixed-signal IC designs through simulations combining analog circuits, Verilog-AMS modules, and Verilog RTL.

The engineer carries verification plans from initial testbench and environment bring-up through regressions and failure debugging. The position also develops scalable and portable verification methodologies and environments, including stimuli, checkers, assertions, trackers, and coverage. Work is 40 hours per week, in Cupertino, California, and various unanticipated locations throughout the USA.

Requirements

• Master’s degree or foreign equivalent in Electrical Engineering, Electronics and Communication Engineering, Computer Engineering, or a related field.
• At least 2 years of experience in the job offered or a related occupation.
• Experience utilizing hardware description languages, including Verilog, SystemVerilog, or Verilog-AMS, to understand issues in digital designs and models.
• Experience designing and developing verification plans using analog design, verification, and debugging to identify design issues and verify analog IP before production.
• Experience understanding mixed-signal design, developing and executing verification plans, and debugging complex mixed-signal IP before production.
• Experience writing test patterns and plans with EDA tools such as Cadence and Synopsys.
• Experience running mixed-signal simulations and debugging issues using Cadence or Synopsys AMS simulation tools to identify functional issues in IP defined by specifications.
• Experience using verification methodologies and tools, including simulators, waveform viewers, or execution automation, to achieve complete verification coverage.
• Experience running simulations and observing outputs using Cadence or Synopsys viewers.
• Experience evaluating and benchmarking Cadence analog and mixed-signal simulators and analyzing their accuracy, strengths, and limitations.
• Experience debugging and resolving issues in Cadence analog and mixed-signal simulation environments, distinguishing tool-level defects from design-level issues, and conducting root-cause analysis.
• Experience reproducing and triaging user-reported tool issues by recreating simulation scenarios and design configurations and working with R&D teams on resolution.

Responsibilities

• Ensure high-quality silicon for IC chips and IPs.
• Review specifications and develop verification plans.
• Execute verification plans to support tape-out.
• Verify power-management IP, including mixed-signal circuits, LDOs, data converters, references, input-output circuits, and clock circuits.
• Verify mixed-signal IC designs through simulations using analog circuits, Verilog-AMS modules, and Verilog RTL.
• Execute verification plans from testbench and environment bring-up through regressions and failure debugging.
• Develop scalable and portable verification methodologies suited to the IP.
• Develop verification environments, including stimuli, checkers, assertions, trackers, and coverage.
• Evaluate and benchmark Cadence analog and mixed-signal simulators, analyzing their accuracy and strengths and limitations.
• Debug simulator issues, distinguish tool-level defects from design-level issues, and conduct root-cause analysis to maintain simulation integrity.
• Reproduce and triage issues reported by tool users, perform root-cause analysis, and work with R&D teams to drive timely resolution.

Benefits

• Comprehensive medical and dental coverage.
• Retirement benefits.
• Discounted products and free services.
• Tuition reimbursement for certain formal education expenses related to career advancement at Apple.
• Potential eligibility for discretionary bonuses or commission payments.
• Potential relocation assistance.
• Discretionary restricted stock unit awards.
• Opportunity to purchase Apple stock at a discount through the Employee Stock Purchase Plan, subject to eligibility and plan terms.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level