ASIC Packaging SI/PI Engineer (Hybrid)
About The Position
Cisco Silicon One is seeking a Signal and Power Integrity Engineer to help develop next-generation ASIC packaging for deployment across Cisco platforms. The role defines, designs, and verifies ASIC packaging, with a focus on advanced IC package design and heterogeneous system integration using technologies such as 2.5D fanout substrates. The engineer develops and documents design rules for ultra-high-speed signaling and analyzes substrate signal and power integrity. The role includes collaborating with layout teams on interposer, substrate, and PCB solutions; designing and documenting ASIC packages for high-volume, high-quality release; and conducting post-layout extraction and reporting. The engineer also works with system partners, vendors, and design leads to achieve power and signal integrity goals and resolve complex technical issues. The role is based within commuting distance of Cisco’s San Jose, California office and requires commuting to the office at least 4–5 days per week.
Requirements
- Bachelor’s degree plus 2 years of related experience, or a master’s degree plus 0 years of related experience.
- Experience with high-speed design principles, including transmission line theory, electromagnetics, scattering parameters, and impedance network analysis, applied to 56G PAM4 SerDes architectures, channel modeling, and BER prediction.
- Experience with pre- and post-layout SI/PI analysis.
- Experience simulating with industry-standard EDA tools such as Cadence Sigrity, Ansys HFSS, or Keysight ADS, and/or validating physical designs through detailed layout reviews and design validation using tools such as Cadence APD and Ansys EM flows.
- Experience with laboratory measurements using VNA, TDR, and other relevant instruments to validate simulation-to-measurement correlations.
- Experience planning and executing SI/PI measurements and laboratory characterization, including VNA measurements, TDR, impedance profiling, insertion/return loss analysis, and full channel characterization.
- Experience with SI/PI characterization, validation, and debugging of high-speed systems and packages using high-bandwidth oscilloscopes, spectrum analyzers, network analyzers, and probe stations.
Nice To Haves
- Ability to articulate ideas and technical concepts to diverse audiences, verbally and in writing.
- Experience with high-bandwidth memory (HBM) or high-speed memory interface SI.
- Experience with die-to-die interfaces such as UCIe or proprietary interfaces.
- Experience with advanced packaging, including CoWoS, EMIB, or interposer-based designs, and SI/PI analysis of 2.5D ASIC packaging.
- Experience developing and executing high-speed interface test plans, correlating measurement results with simulations, and driving root-cause analysis of SI/PI issues.
- Experience analyzing and interpreting S-parameters, channel characteristics, crosstalk, reflections, impedance discontinuities, and power delivery network performance.
- Experience collaborating with ASIC, package, board design, and system engineering teams to optimize end-to-end signal and power integrity.
Responsibilities
- Develop, document, and implement design rules for ultra-high-speed signaling while meeting product power, performance, and area goals.
- Analyze substrate signal integrity and power integrity.
- Collaborate with the layout team to develop optimal solutions across interposer, substrate, and PCB.
- Design, document, and develop ASIC packages for high-volume, high-quality release.
- Perform post-layout extraction and reporting.
- Collaborate with system partners, vendors, and design leads to achieve combined power and signal integrity goals.
- Resolve complex technical issues using advanced technology design rules.
Benefits
- Medical insurance
- Dental insurance
- Vision insurance
- 401(k) plan with Cisco matching contribution
- Paid parental leave
- Short- and long-term disability coverage
- Basic life insurance
- Paid holidays and floating holiday
- Paid birthday day off
- Paid year-end holiday shutdown
- Paid personal wellness days
- Paid vacation or flexible vacation time off, depending on employee classification
- Sick time off
- Additional paid time away may be requested for critical or emergency family issues
- Optional paid volunteer days
- Annual bonuses for eligible non-sales roles
- Potential Cisco restricted stock unit grants
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What This Job Offers
Job Type
Full-time
Career Level
Entry Level
