Wireless SoC Design Engineer

Apple•Irvine, CA

About The Position

Join Apple’s wireless silicon development team, which develops energy-efficient wireless silicon and technologies that transform the user experience. The organization spans RF/Analog, Systems/PHY/MAC, VLSI/RTL, emulation, design verification, test and validation, and firmware/software engineering. In this role, you will work on a small team designing CPU-based subsystems for high-performance, low-power wireless SoCs. You will collaborate with SoC architects, IP developers, and software, firmware, and platform engineering teams to meet power, performance, and area goals, with a particular focus on low-power metrics. You will integrate industry-standard and custom hardware IP into SoCs and contribute to visible ASIC design efforts that support the launch of Apple products.

Requirements

  • Bachelor’s degree minimum.
  • Familiarity with the ASIC design flow.
  • Knowledge of digital design, SoC architecture, and HDL languages such as Verilog.
  • Experience writing micro-architecture specifications and converting them into designs.
  • Exposure to design methodologies and industry-standard EDA tools.
  • Experience with AXI/AHB bus fabric and processor subsystems.
  • Understanding of UPF and low-power design and implementation techniques.
  • Self-starter with a willingness to learn.

Nice To Haves

  • MSEE with some years of industry experience.

Responsibilities

  • Write micro-architecture and design specifications.
  • Code designs in SystemVerilog according to established design guidelines and own RTL development.
  • Integrate IP blocks and optimize memories and hard macros required for the block.
  • Support verification efforts at multiple levels.
  • Check designs using industry-standard static tools such as LINT, CDC, and RDC.
  • Analyze and optimize area, timing, and power.
  • Collaborate with multidisciplinary groups to deliver designs on time and with high quality, incorporating appropriate checks throughout the design process.
  • Participate in hardware/software/power partitioning discussions with software, firmware, and platform engineering teams.
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