The UDV / HW Design Verification Engineer works on-site at the Dallas R&D Lab, planning and conducting hardware verification on units, analyzing issues, and reporting results to engineering teams. The role covers verification planning from product and design requirements through unit bring-up, functional verification, RF and electrical performance checks, issue analysis, and release-readiness reporting. The engineer maintains requirement-to-test traceability and test coverage and may support the factory when needed.
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Job Type
Full-time
Career Level
Mid Level