Staff Package Design Engineer

Renesas Electronics • Tempe, AZ

1d

About The Position

The Staff Package Design Engineer works at the intersection of IC design, advanced package development, and system-level implementation. This Staff-level technical contributor guides the architecture and physical design of next-generation, high-performance semiconductor packages, including 2.5D/3D heterogeneous integration, chiplet-based architectures, high-density interposers, and advanced substrate technologies. The role calls for expertise in advanced packaging R&D and cross-domain co-design, and the ability to define methods and procedures for complex, multi-die integration assignments.

The engineer leads cross-functional alignment with global silicon design, signal integrity/power integrity (SI/PI), thermal, and product engineering teams, and drives the creation of new packaging design rules and methodologies. The role also mentors package design engineers and helps establish standardized CAD workflows and layout practices.

Requirements

• At least 8 years of related experience with a Bachelor's degree, or at least 6 years with a Master's degree; alternatively, at least 5 years of intensive R&D experience in advanced 2.5D/3D heterogeneous packaging, including bridge/interposer architectures, establishing new design rules, and authoring engineering BKMs.
• Strong background in advanced substrate-based packages, flip-chip layout, multi-die/chiplet-based architectures, thermal mitigation, and high-density routing.
• High proficiency with industry-standard package design tools, specifically Siemens/Mentor Xpedition (Layout / Substrate Integrator), Valor NPI, and/or Cadence Allegro Package Designer / SiP Layout.
• Working understanding of SI/PI fundamentals, impedance control, and crosstalk mitigation, and ability to balance these constraints against pin budgets and platform integration requirements.
• Strong communication and technical documentation skills.
• Proven ability to lead multidisciplinary test vehicle or product design meetings and secure tooling/supplier approvals independently.
• Bachelor's or Master's degree in Mechanical Engineering, Electrical Engineering, Microelectronics, Materials Science, or a related technical discipline.

Responsibilities

• Lead package layout architecture and physical design for next-generation heterogeneous integration, including 2.5D/3D chiplet packaging, high-density interposers, bridge technologies, RDL, and advanced FCBGA solutions.
• Define, establish, and optimize package design rules and assembly Best Known Methods (BKMs).
• Partner with foundries, substrate vendors, and OSATs to evaluate and validate advanced packaging capabilities, DRCs, and manufacturing limits.
• Serve as the primary package architecture lead across SI/PI, thermal, tooling, and platform integration teams.
• Lead design reviews to establish project scope, align stakeholder requirements, and balance pin budgets against electrical and mechanical trade-offs.
• Manage package design activities including footprint assignment, stack-up structures, high-speed escape routing, power/ground distribution, and manufacturing release outputs such as Gerber/drill data, bump maps, and assembly drawings.
• Mentor junior and intermediate package design engineers, and establish standardized CAD workflows, layout techniques, and technical training.

Benefits

• Competitive benefits package alongside salary; further information will be provided during the hiring process.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior