Staff Interface Design Engineer, HBM
About The Position
Micron’s HBM Design Architecture team, part of the HBM DRAM Engineering Group, works across design, technology, and manufacturing to develop next-generation HBM solutions for AI and machine-learning workloads. In this full-time onsite role, the engineer provides technology support for the design and development of advanced HBM DRAM products, connecting internal design teams, foundries, and technology development groups to translate process capabilities into scalable, high-performance architectures. The work affects product performance, power efficiency, reliability, and the long-term HBM roadmap. The role also supports design and deployment of AI-enabled solutions to improve efficiency and decision-making. Candidates are expected to demonstrate proven experience in at least three of five focus areas: foundry interface and technology alignment; circuit simulation and analysis; test-chip and silicon validation; PDK and design enablement; and AI-enabled productivity and efficiency improvement.
Requirements
- Bachelor’s, master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience.
- At least 6 years of semiconductor industry experience.
- Solid understanding of advanced semiconductor technology development.
- Strong grasp of advanced CMOS technology nodes, FinFET devices, and process integration.
- Hands-on experience with HSPICE simulations, device characterization, standard-cell benchmarking, PPA analysis, parasitic extraction, and physical verification.
- Experience driving AI-enabled engineering practices and automation to improve engineering efficiency.
- Proven experience in at least three of the five stated focus areas.
Nice To Haves
- Experience working directly with leading foundries such as TSMC, Samsung, Intel Foundry Services, or GlobalFoundries.
- Experience with memory products, including DRAM, HBM, or SRAM.
- Knowledge of TSV technologies, advanced packaging, reliability modeling and aging simulations, advanced BEOL technologies, and PDK development and validation.
- Ability to apply AI tools to summarize, analyze, and extract insights from PDK documentation, Design Rule Manuals, reliability reports, foundry collateral, and silicon characterization data.
- Experience leading technology pathfinding and node-selection activities.
Responsibilities
- Support design and development of advanced HBM DRAM products with technology expertise.
- Bridge internal design teams, foundries, and technology development groups, translating advanced process capabilities into scalable, high-performance architectures.
- Contribute to work in at least three of the focus areas: foundry interface and technology alignment; circuit simulation and analysis; test-chip and silicon validation; PDK and design enablement; AI-enabled productivity and efficiency improvement.
- Drive AI-enabled engineering practices and automation to improve the efficiency of DTCO analysis, foundry collateral evaluation, PDK enablement, benchmarking, and collaboration across build teams.
Benefits
- Medical, dental, and vision plans.
- Programs to help protect income during illness or injury.
- Paid family leave.
- Paid time off.
- Paid holidays.
- Additional compensation may include bonuses and equity.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
