Staff Engineer, DFT

Ambiq Micro • Austin, TX

1d

About The Position

Ambiq is seeking a Staff Engineer, DFT, to implement design-for-test solutions for ultra-low-power SoCs operating with subthreshold technology. The role covers scan insertion, boundary scan, MBIST, and ATPG using standard EDA tools, as well as developing low-power DFT architecture and infrastructure. The engineer will generate and analyze structural test vectors and improve test coverage, test time, and test cost. The position also involves pre- and post-layout scan and MBIST simulations, resolving DFT-related timing, physical, power, and logical issues with designers, and collaborating with test engineers to bring up test vectors on silicon.

Requirements

• BS or MS in ECE/EE.
• At least 8 years of experience in DFT implementation.
• Skilled in DFT structures including scan (Stuck-At, At-Speed, Path-Delay), scan compression, boundary scan, and MBIST.
• Experience creating and implementing hierarchical DFT architecture in complex SoCs.
• Experience in Low-Power DFT and MBIST.
• Experience analyzing test time and test coverage for scan and MBIST patterns.
• Experience working with a test engineering team to bring up production test programs.
• Extensive knowledge of timing concepts and constraint development.
• Experience developing scan ATPG and MBIST test benches and performing simulation in pre- and post-layout environments.
• Experience with RTL.
• Motivated, self-driven, and attentive to detail.
• Strong verbal and written English communication skills.

Nice To Haves

• Experience with scripting such as Tcl.
• Experience with GLS (gate-level simulation).

Responsibilities

• Perform scan insertion, boundary scan, MBIST, and ATPG for ultra-low-power SoCs using standard EDA tools.
• Develop and implement low-power DFT architecture and infrastructure.
• Generate structural test vectors and analyze and improve coverage, test time, and test cost.
• Perform pre- and post-layout scan and MBIST simulations.
• Work with designers on STA, physical, power, and logical issues related to DFT.
• Work with test engineers to bring up test vectors on silicon.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior