Staff Digital IC Design Engineer
MaxLinear, Inc.•Irvine, CA
•$110,000 - $165,000
About The Position
MaxLinear is seeking a Staff Digital IC Design Engineer to develop digital IC functions for high-speed signal processing, datapaths, control, and interfaces. The role covers micro-architecture definition, RTL implementation, block-level verification and design checks, preliminary synthesis and power estimation, and post-silicon bring-up and debug. The engineer will automate design tasks using scripting and AI and collaborate with systems, communications systems, RFIC, and software teams.
Requirements
- Strong fundamentals in digital design, including fixed-point arithmetic, digital datapath design, FSMs, and area, power, and timing optimization.
- Experience with industry ASIC front-end design flow, including RTL coding, debugging, verification, synthesis, and supporting timing closure.
- Experience with SoC integration, including clock/reset architecture, bus protocols, and serial interfaces.
- Strong logical and creative problem-solving skills, with excellent analytical and debugging skills.
- Self-motivated, able to work effectively under pressure, and able to excel in a team environment.
- Flexibility to ramp quickly on new technologies, products, and methodologies.
- Solid written and verbal communication skills.
- BS in Electrical Engineering or a related field plus 5 years of experience, or MS plus 3 years of experience, or a Ph.D.
Nice To Haves
- Knowledge of communications/DSP algorithms and efficient ASIC implementations.
Responsibilities
- Define micro-architecture for high-speed signal processing, digital datapath, control, and interface functions that comply with protocols or standards.
- Implement digital functions in SystemVerilog or Verilog RTL.
- Perform block-level verification, including testbench creation, test-plan definition, test-case creation and debugging, RTL and gate-level simulation, and code-coverage analysis.
- Perform block-level preliminary synthesis and power estimation, including SDC constraint specification and vector-driven power analysis.
- Perform block-level design checks, including lint, CDC, and DFT-readiness checks.
- Support post-silicon bring-up and perform silicon debug in the lab.
- Automate design tasks using Python, Perl, shell scripts, and AI.
- Collaborate with systems, communications systems, RFIC, and software teams.
Benefits
- Health care benefits
- 401k savings plan
- Employee Stock Purchase Plan (ESPP)
- Paid time off
- Annual discretionary bonus eligibility
- Stock-based compensation for some positions
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What This Job Offers
Job Type
Full-time
Career Level
Senior
