The Staff Design Engineer, IC Layout will work within Impinj’s Layout Design Engineering group, part of the Silicon Engineering department. The group collaborates internationally with analog RFID endpoint IC and Reader IC development teams and delivers tape-outs for RFID products, test chips, reader ICs, and design-of-experiments work. Layout decisions affect silicon power efficiency, cost, and time to market, and the team emphasizes continuous improvement, quality, speed, reliability, and zero defects at very high production volumes. The role performs detailed transistor-level layout for RF, mixed-signal, and analog circuit blocks, including high-performance RF and ultra-low-power, compact RFID. It works closely with analog and digital design teams on floor planning, pin placement, power-supply strategy, and signal distribution, and participates in layout reviews and schedule coordination.
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Job Type
Full-time
Career Level
Senior