Staff Design Engineer, IC Layout

Impinj
•$136,000 - $204,000

About The Position

The Staff Design Engineer, IC Layout will work within Impinj’s Layout Design Engineering group, part of the Silicon Engineering department. The group collaborates internationally with analog RFID endpoint IC and Reader IC development teams and delivers tape-outs for RFID products, test chips, reader ICs, and design-of-experiments work. Layout decisions affect silicon power efficiency, cost, and time to market, and the team emphasizes continuous improvement, quality, speed, reliability, and zero defects at very high production volumes. The role performs detailed transistor-level layout for RF, mixed-signal, and analog circuit blocks, including high-performance RF and ultra-low-power, compact RFID. It works closely with analog and digital design teams on floor planning, pin placement, power-supply strategy, and signal distribution, and participates in layout reviews and schedule coordination.

Requirements

  • Bachelor’s degree in computer or electrical engineering and at least 8 years of experience.
  • Experience in custom analog, RF, and mixed-signal layout.
  • Ability to collaborate with other layout engineers on top-level IC floorplanning and partner with circuit designers to resolve complex problems.
  • Understanding of semiconductor manufacturing processes and foundry technologies across advanced process nodes down to 16 nm for ultra-low-power and high-fidelity applications.
  • Knowledge of analog layout challenges and layout-dependent effects in advanced processes, including noise coupling, matching, parasitics, LOD, WPE, PSE, and coloring, and proficiency with mitigation techniques such as guard rings, DNW, PN junctions, parasitic management, signal integrity, reliability (EMIR), and ESD.
  • Proficiency with Cadence Virtuoso layout editor and Cadence/Siemens layout verification tools, including PVS and Siemens Calibre DRC/LVS.
  • Ability to interpret and correct ERC, DRC, and LVS error reports.
  • Excellent communication and collaboration skills.
  • Strong technical project management skills.

Responsibilities

  • Perform detailed transistor-level layout of RF, mixed-signal, and analog circuit blocks for high-performance RF and ultra-low-power, compact RFID.
  • Collaborate with analog and digital design teams on floor planning, pin placement, power-supply strategy, and signal distribution between blocks.
  • Conduct layout reviews covering power and ground routing, electromigration, matching, and signal coupling.
  • Participate in schedule meetings coordinating layout and floorplan activities.

Benefits

  • US-based employees have access to healthcare benefits.
  • 401(k) plan with company match.
  • Certain roles are eligible for merit increases, annual bonuses, and stock awards based on individual performance.
  • Certain roles may be eligible for sales incentives, depending on the plan and employee role.
  • Open paid-time-off policy.
  • Support for remote work.
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