Marvell is seeking a senior staff DFT engineer for its Optical DSP team in Santa Clara. The team develops advanced ASICs for hyperscale data center, enterprise, and AI infrastructure markets, including multi-terabit retimers, coherent DSP devices, and high-speed optical transceivers. The position supports a next-generation ODSP program and helps establish methodology and flows for flagship products developed in advanced TSMC process nodes. The engineer will define and implement DFT architecture for a chip block, integrate IP-level DFT, drive ATPG targets, lead DFT sign-off and handoff, and support silicon debug and yield learning. The role also includes mentoring engineers, coordinating across engineering disciplines, and improving DFT methodology and automation.
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Job Type
Full-time
Career Level
Senior