Sr. IC Package Design Engineer (Silicon Engineering)

SpaceX • Austin, TX

4d

About The Position

SpaceX is seeking a motivated, proactive, and intellectually curious engineer to work alongside cross-disciplinary teams including systems, firmware, architecture, design, validation, product engineering, and ASIC implementation. The role involves developing next-generation ASICs for deployment in space and ground infrastructure. As an integral member of the IC design team, the engineer will lead packaging for custom in-house ASICs and RFICs used in digital beam formers and modems.

Requirements

• Bachelor's degree in electrical engineering, computer engineering, or physics.
• At least 5 years of experience with IC package design.
• Ability to work extended hours or weekends as needed to meet mission-critical deadlines.
• Must meet U.S. Government export-control eligibility requirements: be a U.S. citizen or national, lawful permanent resident, refugee, or asylee, or be eligible to obtain required authorizations from the U.S. Department of State.

Nice To Haves

• Experience with Co-packaged Optics (CPO).
• Thorough understanding of signal and power integrity fundamentals.
• Substrate design experience for RF, digital, high-speed, and mixed-signal die.
• Experience with Cadence APD+/SIP or similar design tools.
• Experience in package design electrical reviews and SI/PI analysis.
• Fluency with SI/PI and EM simulation tools such as SIWave, HFSS, and ADS.
• Experience in package design for manufacturing reviews.
• Familiarity with BGA package substrate technologies.
• Strong problem-solving skills and strong engineering fundamentals.

Responsibilities

• Own and drive advanced package selection, new product BGA configuration, and package structure.
• Manage package/SIP layout, optimization, design verification, and tapeout.
• Interface and coordinate with cross-functional SpaceX groups on package selection, feasibility analysis, and design for new products.
• Work cross-functionally to understand trade-offs and constraints and optimize silicon floor plans, bumps, and package pinouts.
• Simulate and optimize signal integrity, power integrity, and RF performance of package designs.
• Drive methodology, innovation, and productivity improvements in package design.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior