SoC Power Design Engineer

Qualcomm•San Diego, CA
•$121,800 - $182,600

About The Position

Qualcomm Technologies, Inc. is seeking an ASIC Engineer to contribute to IP (block/SoC) development for high-performance, high-quality, low-power products. The role involves defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting ASIC IP. The engineer collaborates with cross-functional teams to determine product execution and develop implementation strategies that meet system requirements and customer needs. The position creates architectures, circuit specifications, logic designs, and system simulations from system-level requirements; evaluates design flow from high-level design through synthesis, place and route, timing, power use, and verification; and uses tools such as RTL-to-GDS flow and Virtuoso. It also includes writing detailed technical documentation. The role works independently with minimal supervision and may influence decisions beyond the immediate work group.

Requirements

  • Bachelor's degree in Science, Engineering, or a related field and 2+ years of ASIC design, verification, validation, integration, or related work experience; or a Master's degree in Science, Engineering, or a related field and 1+ year of such experience; or a Ph.D. in Science, Engineering, or a related field.
  • Work independently with minimal supervision.
  • Have verbal and written communication skills to convey information; basic negotiation, influence, and tact may be required.
  • Perform multi-step tasks requiring planning, problem-solving, and prioritization.

Nice To Haves

  • Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
  • 3+ years of ASIC design, verification, validation, integration, or related work experience.
  • 2+ years of experience with architecture and design tools.
  • 2+ years of experience with scripting tools and programming languages.
  • 2+ years of experience with design verification methods.

Responsibilities

  • Define, model, design, optimize, verify, validate, implement, and document IP (block/SoC) development for high-performance, high-quality, low-power products.
  • Create architectures, circuit specifications, logic designs, and system simulations based on system-level requirements.
  • Collaborate across teams, including software and hardware architecture, to develop and execute implementation strategies that meet system requirements and customer needs.
  • Evaluate process-flow aspects from high-level design through synthesis, place and route, timing, power use, and verification, or equivalent custom circuit design and layout flows.
  • Use tools and applications, including RTL-to-GDS flow and Virtuoso, to support architecture and design of an individual block/SoC or IC package.
  • Write detailed technical documentation for EDA, IP, and ASIC projects.

Benefits

  • Competitive annual discretionary bonus program.
  • Opportunity for annual RSU grants, except for employees on sales-incentive plans.
  • Competitive benefits package designed to support success at work, at home, and at play.
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