SoC Design Engineer

Capgemini • Atlanta, GA

23h • $73,150 - $174,000 • Onsite

About The Position

Capgemini Engineering is seeking a SoC Design Engineer to contribute to the architecture, integration, and implementation of complex System-on-Chip solutions. The engineer will own SoC subsystems throughout the design lifecycle, from architectural definition and IP integration through implementation support and silicon readiness. The role works closely with design, verification, physical implementation, and PCB engineering teams to deliver high-performance, power-efficient solutions. The position is 100% onsite at a local office.

Requirements

• Master's degree in Electrical Engineering or a related technical discipline, or equivalent industry experience.
• Four or more years of experience in SoC integration, design, or related semiconductor engineering roles.
• Strong experience integrating complex SoC subsystems such as processors, PCIe, DDR, or similar technologies.
• Proficiency with RTL design methodologies and hardware description languages, including Verilog, SystemVerilog, or VHDL.
• Experience developing and maintaining CDC, RDC, linting, synthesis, and power analysis flows.
• Strong scripting and automation skills using languages such as Tcl and Python.
• Excellent verbal and written communication skills and ability to collaborate effectively across global engineering teams.

Nice To Haves

• Experience integrating ARM Cortex-A or Cortex-R class processors.
• Experience integrating GPU-based subsystems and graphics architectures.
• Knowledge of MMU-based systems and cache-coherent architectures.
• Experience with RTL-to-GDS implementation flows.
• Familiarity with verification methodologies such as UVM.
• Experience using Synopsys tool suites, including VCS, Verdi, SpyGlass, Design Compiler, and RTL Architect.
• Working knowledge of embedded software development using C.

Responsibilities

• Define and document architecture specifications for SoC subsystems and contribute to overall chip architecture decisions.
• Integrate complex SoC subsystems, including processors, memory, and high-speed interfaces.
• Collaborate with IP vendors and internal stakeholders to select and configure IP solutions.
• Develop and maintain timing, power, and quality methodologies, including SDC constraints, UPF implementation, CDC/RDC analysis, and linting flows.
• Analyze power, performance, and area results and drive design optimizations to meet product objectives.
• Partner with synthesis, DFT, and physical design teams to resolve timing, power, and implementation challenges.
• Support PCB design and system integration activities to facilitate product development and deployment.

Benefits

• Paid time off based on employee grade, including 12–25 vacation days depending on grade, company-paid holidays, personal days, and sick leave.
• Medical, dental, and vision coverage, or provincial healthcare coordination in Canada.
• Retirement savings plans, such as 401(k) in the U.S. or RRSP in Canada.
• Life and disability insurance.
• Employee assistance programs.
• Other benefits as provided by local policy and eligibility.
• The role may be eligible for additional compensation such as variable incentives, bonuses, or commissions, depending on the position and applicable laws.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level