The SoC Physical Design Engineer will implement physical design for Optical Network ASICs, learn and work with latest technology nodes, develop implementation flows, and help deliver ASICs optimized for power, performance, and area (PPA). The role spans block-level and full-chip physical implementation, timing closure and sign-off, physical verification, and IR/EM analysis. It also involves collaboration with logic designers and hardware teams, technical evaluation of IP vendors and process nodes, and methodology and automation development across the flow from synthesis to GDSII.
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Job Type
Full-time
Career Level
Mid Level