SMTS Silicon Design Engineer

Advanced Micro Devices, Inc•Austin, TX

About The Position

AMD is hiring an SMTS Silicon Design Engineer to lead research and development in emerging formal verification domains, including security, safety, low-power, and architect-level formal verification. The role explores the feasibility of formalizing the ISA and memory model for GFXIP design, defines long-term formal verification strategy and technical roadmaps, and develops methodologies that cover graphics design datapath and control logic. It also scales formal verification to large, critical designs and expands its use across the IP development lifecycle. The position addresses challenging convergence issues using techniques such as induction, reduction, and abstraction, and defines verification infrastructure to improve productivity. Responsibilities also include semiconductor and ASIC research, design, verification, simulation, documentation, and evaluation across the design flow, from high-level designs through synthesis, place and route, timing, and power. The engineer leads significant technical projects, works with cross-functional teams, and exercises independent judgment with little to no supervision.

Requirements

Master’s degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronics Engineering, or a related field, plus four years of experience in the job offered or a closely related engineering role; alternatively, a bachelor’s degree or foreign equivalent in one of these fields plus six years of progressive, post-baccalaureate experience in the job offered or a closely related engineering role.
Four years of experience with formal verification of algorithms, engines, and use cases.
Four years of experience with SystemVerilog Assertion and abstract model development.
Four years of experience using formal verification tools from Academy and EDA vendors, such as JasperGold, VC Formal, Murphi, or a theorem prover.
Four years of experience delivering high-quality verification for modern, large-scale processor designs such as CPU, GPU, or AI processors.
Four years of experience with computer architecture and graphics pipelines.
Four years of experience developing formal verification infrastructure for FPV, DPV, SEV, and other use cases.

Responsibilities

Lead research into emerging formal verification domains such as security, safety, low-power, and architect-level formal verification.
Explore the feasibility of formalizing the ISA and memory model for GFXIP design.
Define the long-term strategy and technical roadmap for expanding formal verification.
Develop formal verification methodology covering graphics design datapath and control logic.
Scale formal verification to large and critical designs and expand its adoption throughout the IP development lifecycle.
Resolve formal verification convergence issues using techniques such as induction, reduction, and abstraction.
Define and drive formal verification infrastructure to improve productivity.
Research, design, develop, and test electronic components and systems for semiconductor and related device manufacturing.
Lead definition, design, verification, and documentation for ASIC development.
Determine architecture design, logic design, and system simulation; define module interfaces and formats for simulation.
Lead multidimensional designs involving the layout of complex integrated circuits.
Evaluate the process flow from high-level design through synthesis, place and route, timing, and power use.
Work with cross-functional teams on ASIC and layout design, including significant and unique technical issues.
Drive projects or processes of significant technical importance.
Select methods, techniques, and evaluation criteria independently to obtain results with little to no supervision.
Apply knowledge of computers, electronics, engineering principles, best practices, and technologies to AMD product design, development, and testing.