Silicon Design Lead
About The Position
OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for advanced AI workloads. The team is developing future generations of AI-native silicon and integrated systems to support frontier models and OpenAI’s supercomputing platform. The Silicon Design Lead drives the architecture, microarchitecture, and implementation of key IP and subsystems for AI hardware platforms. The role translates functional, performance, and security requirements into silicon designs and owns technical decisions from architectural definition through implementation and integration. A portion of the role focuses on implementing hardware security in partnership with OpenAI’s Security team: translating its security architecture and requirements into silicon microarchitecture and implementation while balancing security capabilities with performance, power, area, and design complexity. The role also contributes to general silicon architecture and microarchitecture.
Requirements
- Strong experience in silicon IP or subsystem-level architecture, microarchitecture, and implementation.
- Experience owning hardware IP or subsystem designs from architectural definition through implementation and integration.
- Experience implementing hardware security features such as memory encryption, key management, access controls, isolation, or secure boot.
- Understanding of how to translate functional and security requirements into hardware architectures, interfaces, and microarchitectural specifications.
- Working knowledge of RTL design and coding proficiency in Verilog or SystemVerilog, with the ability to read, review, and contribute to RTL.
- Ability to evaluate performance, power, area, and complexity tradeoffs across silicon designs.
- Ability to work effectively across security, silicon architecture, RTL, verification, firmware, and software teams to drive designs from concept through execution.
- Candidates may need to meet certain legal status requirements under U.S. export control laws and regulations.
Nice To Haves
- Broader SoC-level architecture or integration experience; deep IP or subsystem-level expertise is sufficient.
Responsibilities
- Own architecture, microarchitecture, and implementation of silicon IP and subsystems, from requirements and design specifications through integration and validation.
- Define hardware interfaces, data flows, and microarchitectural tradeoffs to meet functional, performance, power, and area requirements.
- Partner with OpenAI’s Security team to translate security architecture, requirements, and threat models into implementable hardware capabilities.
- Design and integrate hardware security mechanisms, including encryption, key management, access controls, isolation, and data protection across silicon subsystems.
- Evaluate architectural and implementation tradeoffs to ensure security capabilities meet functional and performance requirements.
- Collaborate with silicon architects, RTL, verification, firmware, and software teams to drive subsystem design, integration, and validation.
- Review and contribute to RTL implementations, ensuring designs align with architectural intent and system requirements.
- Evaluate existing and third-party IP, identify architectural or implementation gaps, and drive solutions across subsystem boundaries.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
Education Level
No Education Listed
